? semiconductor components industries, llc, 2014 september, 2014 ? rev. 10 1 publication order number: mc74hc1g04/d mc74hc1g04 single inverter the mc74hc1g04 is a high speed cmos inverter fabricated with silicon gate cmos technology. the internal circuit is composed of multiple stages, including a buffer output which provides high noise immunity and stable output. the mc74hc1g04 output drive current is 1/2 compared to mc74hc series. ? high speed: t pd = 7 ns (typ) at v cc = 5 v ? low power dissipation: i cc = 1 a (max) at t a = 25 c ? high noise immunity ? balanced propagation delays (t plh = t phl ) ? symmetrical output impedance (i oh = i ol = 2 ma) ? chip complexity: fet = 105 ? nlv prefix for automotive and other applications requiring unique site and control change requirements; aec?q100 qualified and ppap capable ? these devices are pb?free and are rohs compliant figure 1. pinout (top view) v cc nc in a out y gnd figure 2. logic symbol in a out y 1 1 2 3 4 5 see detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. ordering information marking diagrams l h function table input a output y h l pin assignment 1 2 3 gnd nc in a 4 5v cc out y sc?88a (sc70?5/sot?353) df suffix case 419a tsop?5 dt suffix case 483 1 5 http://onsemi.com h5 m h5 m h5 = specific device code m = date code = pb?free package (note: microdot may be in either location) 1 5 sc?88a tsop?5
mc74hc1g04 http://onsemi.com 2 maximum ratings symbol parameter value unit v cc dc supply voltage ?0.5 to +7.0 v v in dc input voltage ?0.5 to v cc + 0.5 v v out dc output voltage ?0.5 to v cc + 0.5 v i ik dc input diode current 20 ma i ok dc output diode current 20 ma i out dc output sink current 12.5 ma i cc dc supply current per supply pin 25 ma t stg storage temperature range ?65 to +150 c t l lead temperature, 1 mm from case for 10 seconds 260 c t j junction temperature under bias +150 c ja thermal resistance sc70?5/sc?88a (note 1) tsop?5 350 230 c/w p d power dissipation in still air at 85 c sc70?5/sc?88a tsop?5 150 200 mw msl moisture sensitivity level 1 f r flammability rating oxygen index: 28 to 34 ul 94 v?0 @ 0.125 in v esd esd withstand voltage human body model (note 2) machine model (note 3) charged device model (note 4) > 2000 > 200 n/a v i latchup latchup performance above v cc and below gnd at 125 c (note 5) 500 ma stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 1. measured with minimum pad spacing on an fr4 board, using 10 mm?by?1 inch, 2 ounce copper trace with no air flow. 2. tested to eia/jesd22?a114?a. 3. tested to eia/jesd22?a115?a. 4. tested to jesd22?c101?a. 5. tested to eia/jesd78. recommended operating conditions symbol parameter min max unit v cc dc supply voltage 2.0 6.0 v v in dc input voltage 0.0 v cc v v out dc output voltage 0.0 v cc v t a operating temperature range ?55 +125 c t r , t f input rise and fall time v cc = 2.0 v v cc = 3.0 v v cc = 4.5 v v cc = 6.0 v 0 0 0 0 1000 600 500 400 ns functional operation above the stresses listed in the recommended operating ranges is not implied. extended exposure to stresse s beyond the recommended operating ranges limits may affect device reliability. device junction temperature versus time to 0.1% bond failures junction temperature c time, hours time, years 80 1,032,200 117.8 90 419,300 47.9 100 178,700 20.4 110 79,600 9.4 120 37,000 4.2 130 17,800 2.0 140 8,900 1.0 1 1 10 100 1000 failure rate of plastic = ceramic until intermetallics occur figure 3. failure rate vs. time junction temperature normalized failure rate time, years t j = 130 c t j = 120 c t j = 110 c t j = 100 c t j = 90 c t j = 80 c
mc74hc1g04 http://onsemi.com 3 dc electrical characteristics v cc t a = 25 c t a 85 c 55 c t a 125 c symbol parameter test conditions (v) min typ max min max min max unit v ih minimum high?level input voltage 2.0 3.0 4.5 6.0 1.5 2.1 3.15 4.20 1.5 2.1 3.15 4.20 1.5 2.1 3.15 4.20 v v il maximum low?level input voltage 2.0 3.0 4.5 6.0 0.5 0.9 1.35 1.80 0.5 0.9 1.35 1.80 0.5 0.9 1.35 1.80 v v oh minimum high?level output voltage v in = v ih or v il v in = v ih or v il i oh = ?20 a 2.0 3.0 4.5 6.0 1.9 2.9 4.4 5.9 2.0 3.0 4.5 6.0 1.9 2.9 4.4 5.9 1.9 2.9 4.4 5.9 v v in = v ih or v il i oh = ?2 ma i oh = ?2.6 ma 4.5 6.0 4.18 5.68 4.31 5.80 4.13 5.63 4.08 5.58 v ol maximum low?level output voltage v in = v ih or v il v in = v ih or v il i ol = 20 a 2.0 3.0 4.5 6.0 0.0 0.0 0.0 0.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 v v in = v ih or v il i ol = 2 ma i ol = 2.6 ma 4.5 6.0 0.17 0.18 0.26 0.26 0.33 0.33 0.40 0.40 i in maximum input leakage current v in = 6.0 v or gnd 6.0 0.1 1.0 1.0 a i cc maximum quiescent supply current v in = v cc or gnd 6.0 1.0 10 40 a ac electrical characteristics (input t r = t f = 6.0 ns) t a = 25 c t a 85 c 55 c t a 125 c symbol parameter test conditions min typ max min max min max unit t plh , t phl maximum propagation delay, input a or b to y v cc = 5.0 v c l = 15 pf 3.5 15 20 25 ns v cc = 2.0 v c l = 50 pf v cc = 3.0 v v cc = 4.5 v v cc = 6.0 v 18 10 7 6 100 27 20 17 125 35 25 21 155 90 35 26 t tlh , t thl output transition time v cc = 5.0 v c l = 15 pf 3 10 15 20 ns v cc = 2.0 v c l = 50 pf v cc = 3.0 v v cc = 4.5 v v cc = 6.0 v 25 16 11 9 125 35 25 21 155 45 31 26 200 60 38 32 c in maximum input capacitance 5 10 10 10 pf typical @ 25 c, v cc = 5.0 v c pd power dissipation capacitance (note 6) 10 pf 6. c pd is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption with out load. average operating current can be obtained by the equation: i cc(opr ) = c pd v cc f in + i cc . c pd is used to determine the no?load dynamic power consumption; p d = c pd v cc 2 f in + i cc v cc .
mc74hc1g04 http://onsemi.com 4 *includes all probe and jig capacitance. a 1?mhz square input wave is recommended for propagation delay tests. figure 4. switching waveforms figure 5. test circuit c l* input output v cc gnd 50% 50% input a output y t phl t plh 90% 10% 90% 10% t tlh t thl t r t f device ordering information device nomenclature device order number logic circuit indicator temp range identifier technology device function package suffix tape and reel suffix package type tape and reel size ? mc74hc1g04dft1g mc 74 hc1g 08 df t1 sc?88a (sc70?5/sot?353) (pb?free) 178 mm (7 in) 3000 unit NLVHC1G04DFT1G* nlv 74 hc1g 08 df t1 sc?88a (sc70?5/sot?353) (pb?free) 178 mm (7 in) 3000 unit mc74hc1g04dft2g mc 74 hc1g 08 df t2 sc?88a (sc70?5/sot?353) (pb?free) 178 mm (7 in) 3000 unit nlvhc1g04dft2g* nlv 74 hc1g 08 df t2 sc?88a (sc70?5/sot?353) (pb?free) 178 mm (7 in) 3000 unit mc74hc1g04dtt1g mc 74 hc1g 08 dt t1 tsop?5 (pb?free) 178 mm (7 in) 3000 unit ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *nlv prefix for automotive and other applications requiring unique site and control change requirements; aec?q100 qualified and ppap capable.
mc74hc1g04 http://onsemi.com 5 package dimensions notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. 419a?01 obsolete. new standard 419a?02. 4. dimensions a and b do not include mold flash, protrusions, or gate burrs. dim a min max min max millimeters 1.80 2.20 0.071 0.087 inches b 1.15 1.35 0.045 0.053 c 0.80 1.10 0.031 0.043 d 0.10 0.30 0.004 0.012 g 0.65 bsc 0.026 bsc h --- 0.10 --- 0.004 j 0.10 0.25 0.004 0.010 k 0.10 0.30 0.004 0.012 n 0.20 ref 0.008 ref s 2.00 2.20 0.079 0.087 b 0.2 (0.008) mm 12 3 4 5 a g s d 5 pl h c n j k ?b? sc?88a (sc?70?5/sot?353) case 419a?02 issue l mm inches scale 20:1 0.65 0.025 0.65 0.025 0.50 0.0197 0.40 0.0157 1.9 0.0748 solder footprint* *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
mc74hc1g04 http://onsemi.com 6 package dimensions tsop?5 case 483?02 issue k notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. 4. dimensions a and b do not include mold flash, protrusions, or gate burrs. mold flash, protrusions, or gate burrs shall not exceed 0.15 per side. dimension a. 5. optional construction: an additional trimmed lead is allowed in this location. trimmed lead not to extend more than 0.2 from body. dim min max millimeters a 3.00 bsc b 1.50 bsc c 0.90 1.10 d 0.25 0.50 g 0.95 bsc h 0.01 0.10 j 0.10 0.26 k 0.20 0.60 m 0 10 s 2.50 3.00 123 54 s a g b d h c j 0.7 0.028 1.0 0.039 mm inches scale 10:1 0.95 0.037 2.4 0.094 1.9 0.074 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.20 5x c ab t 0.10 2x 2x t 0.20 note 5 c seating plane 0.05 k m detail z detail z top view side view a b end view p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 mc74hc1g04/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner.
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