MIC24046 pin - programmable, 4.5v ? micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1 (408) 944 - 0800 ? fax + 1 (408) 474 - 1000 ? http://www.micrel.com october 1 4 , 2015 revision 1. 1 general description the MIC24046 is a pin - programmable, high ? efficiency, wide input range, 5a synchronous step - down regulator. the MIC24046 is perfectly suited for multiple - voltage rail application environments typically found in computing and telecommunication systems . it can be programmed by pin strapping various parameters , such as output voltage, switching frequency, and current - limit val ues . the pin - selectable switching frequency, valley - current mode control technique, high ? performance error amplifier, and external compen sation allow for the best trade - offs between high efficiency and the smallest possible solution size. the MIC24046 is a vailable in a thermally ? efficient, space - saving , 20 ? pin 3mm 3mm qfn package with an operating junction temperature range of ? 40 c to +125 c. datasheets and support documentation are available on micrel?s website at : www.micrel.com . features ? 4.5 v to 19 v input voltage range ? 5a (maximum) output current ? high efficiency (>90%) ? pin - selectable output voltage s: ? 0. 7 v , 0.8v, 0.9v, 1.0v, 1.2v, 1.5v, 1.8v, 2.5v, and 3.3v ? 1% output voltage accuracy ? supports safe start - up with pre - biased output ? pin - selectable current limit and switching frequency ? internal soft - start and t hermal shutdown protection ? hiccup - mode s hort - circuit protection ? available in a 20 - pin 3 mm 3 mm qfn package ? ? 40c to +125c junction temperature range applications ? servers, data storage, routers, and base stations ? fpgas, dsp, and low - voltage asic power typical application MIC24046 12v in 5a dc/ dc converter
micrel, inc. MIC24046 october 1 4 , 2015 2 revision 1. 1 ordering information part number junction temperature range package lead finish MIC24046yfl ? 40c to +125c 20? pin 3 mm 3 mm qfn pb - free pin configuration 20? pin 3mm 3mm qfn (fl) (top view) pin description pin number pin name pin function 1 ? 2 vin input voltage for the buck converter power stage: these pins are the drain terminal of the internal high - side n - channel mosfet. a 10 f minimum ceramic capacitor should be connected from vin to pgnd as close as possible to the device. a combination of multiple ceramic capacitors of different sizes is recommended. 3 ? 4, 13 pgnd low - side mosfet source terminal and low - side driver return: connect the ceramic input capacitors to pgnd as close as possible to the dev ice. 5 ? 6 lx switch node: drain (low - side mosfet) and source (high- side mosfet) connection of the internal power n - channel fets. the external inductor (switched side) and bootstrap capacitor (bottom terminal) must be connected to these pins. 7 bst bootstrap: supply voltage for the driver of the high - side n - channel power mosfet. connect the bootstrap capacitor (top terminal) to this pin. 8 pg power good (output): when the output voltage is within 92.5% of the nominal set point, this pin will go fro m logic low to logic high through an external pull - up resistor. this pin is the drain connection of an internal n - channel fet . 9 voset0 three - state pin (low, high, and high- z) for output voltage programming: together with voset1, voset0 defines nine logi c values corresponding to nine output voltage selections. 10 voset1 three - state pin ( low, high, and high - z) for output voltage programming: together with voset0, voset1 defines nine logic values corresponding to nine output voltage selections.
micrel, inc. MIC24046 october 1 4 , 2015 3 revision 1. 1 pin description (continued) pin number pin name pin function 11 ilim three - state ( low, high, and high -z ) current - limit selection pin . 12 freq three - state (low, high, and high - z) switching frequency selection pin . 14 a gnd analog ground: quiet ground for the analog circuitry of the internal regulator and return terminal for the external compensation network. 15 comp transconductance error amplifier output : connect a compensation network from this pin to agnd . 16 outsns output sensing : connect this pin direct ly to the buck converter output voltage. this pin is the top side terminal of the internal feedback divider. 17 en/dly precision enable/turn - on delay input. the en/dly pin is first compared against a 507 mv threshold to turn - on the on - board ldo regulator. the en/dly pin is then compared against a 1.21v (typical) threshold to initiate output power delivery. a 150mv typical hysteresis prevents chattering when power delivery is started. a 2a (typical) current source pulls up the en/dly pin. turn - on delay can be achieved by connecting a capacitor from en/dly to ground, while using an open - drain output to drive the en/dly pin. 18 vdda output of the internal linear regulator and internal supply for analog control. a 1f minimum ceramic capacitor should be connec ted from this pin to agnd; 2.2f nominal value recommended. 19 vddp internal supp ly rail for the mosfet drivers ( fed by the vdda pin ): an internal resistor (10?) between pins vddp and vdda is provided in the regulator in order to implement an rc filter fo r switching noise suppression. a 1f minimum ceramic capacitor should be connected from this pin to pgnd; 2.2f nominal value recommended. 20 vinldo input o f the internal linear regulator: this pin is typically connected to the input voltage of the buck converter stage (vin). if vinldo and vin are connected to different voltage rails, individually bypass vinldo to ground with a 100nf ceramic capacitor. pgnd_ep pgn d pgnd exposed pad: electrically connected to pgnd pins. connect with thermal vias to the ground plane to ensure adequate heat - sinking. follow recommendations as illustrated in the pcb layout recommendations section vin_ep vin vin exposed pad : electrically connected to vin pins. if an input power distribution plane is available, connect with thermal vias to that plane to improve heat - sinking. follow recommendations as illustrated in the pcb layout recommendations section lx_ep lx lx exposed pad: elect rically connected to lx pins. follow recommendations as illustrated in the pcb layout recommendations section
micrel, inc. MIC24046 october 1 4 , 2015 4 revision 1. 1 absolute maximum ratings ( 1 ) v vin , v vi nldo to agnd ................................... ? 0.3v to + 20 v v vddp , v vdda t o agnd ..................................... ? 0.3v to +6v v vi nldo to v vdda ............................................. ? 0.3v to +20 v v vddp to v vdda ............................................... ? 0.3v to +0.3v v v osetx , v freq , v ilim , t o a gnd ......................... ? 0.3v to + 6 v v bst to v lx ....................................................... ? 0.3v to + 6v v bst to agnd ................................................ ? 0.3v to +26 v v en/dly to a gnd ........................ ? 0.3v to v vdda + 0.3v, +6v v pg to a gnd ................................................... ? 0.3v to +6v v comp , v outsns to a gnd ........... ? 0.3v to v vdda + 0.3v, +6v a gnd to pgnd ............................................ ? 0.3v to +0.3v junction temperature .............................................. +150 c storage temperature (t s ) ......................... ? 65 c to +150 c lead temperature (soldering, 10s) ............................ 260 c esd ratin g ( 4) hbm ......................................................................... 2kv mm ......................................................................... 150v operating ratings ( 2 ) supply voltage ( v vin , v vi nldo ) ........................... 4.5 v to 19 v externally applied analog and drivers supply voltage (v vi nldo = v vdda = v vddp ) .................................. 4.5 v to 5.5 v enable voltage ( v en/dly ) .................................... 0 v to v v dda power - good (pg) pull - up voltage (v pu_pg ) ........ 0v to 5.5v output current ................................................................. 5a junction temperature (t j ) ........................ ? 40 c to +125 c junction to ambient thermal resistance 20- pin 3mm 3mm qfn ( ja ) (3) ........................ 29 c/w electrical characteristics ( 5 ) v vi n = v vi nldo = 12 v; c vdda = 2.2 f, c vddp = 2.2 f, t a = 25 c, unless otherwise noted. bold values indicate ? 40 & |