IC-LFM 64x1 linear image sensor rev a0.2, page 1/ 9 features ? 64 active photo pixels of 56 m at a pitch of 63.5 m (400 dpi) ? integrating l-v conversion followed by a sample & hold circuit ? high sensitivity and uniformity over wavelength ? high clock rates of up to 5 mhz ? only 64 clocks required for readout ? shutter function enables ?exible integration times ? glitch-free analogue output ? push-pull output ampli?er ? 5 v single supply operation applications ? optical line sensors ? ccd substitute packages obga lfm1c block diagram copyright ? 2012 ic-haus http://www.ichaus.com p r e l i m i n a r y p r e l i m i n a r y dis q d c bit 3 q nr d nq nr q c vhe one nq ns nq steuerung bit 1 c multiplexer steuerung und schieberegister d pixel? pixoi pixel 1 nrci snh64 bit 63 rpix(1:64) snh fotodiodenzeile ausgangs? c sample?and?hold? nq d bit 2 q ns q versorgung pixel 2 nr verst?rker pixel 64 bit 64 nq d pixei ref c vho agnd ao clk gnd rset si vcc vdd ic?lfm
IC-LFM 64x1 linear image sensor rev a0.2, page 2/ 9 description IC-LFM is an integrating light-to-voltage converter with a single line of 64 pixels pitched at 63.5 m (center-to-center distance). each pixel consists of a 56.4 m x 200 m photodiode, an integration capaci- tor and a sample and hold circuit. the integrated control logic makes operation very simple, with only a start and clock signal necessary. a third control input enables the integration period to be paused at any time (electronic shutter). with the start signal the hold mode is activated for all pixels simultaneously with the next rising clock edge; starting with pixel 1 the hold voltages are switched in sequence to the push-pull output ampli?er. the sec- ond clock pulse deletes all integration capacitors and the integration period starts again in the background during the output phase. a run is complete after 64 clock pulses. IC-LFM is suitable for high clock rates of up to 5 mhz. if this is not required the supply current can be re- duced via the external bias setting. packages obga lfm1c pin configuration obga lfm1c pin functions no. name function 1 si start integration input 2 clk clock input 3 ao analogue output 4 vcc +5 v supply voltage 5 rset bias current (connected to gnd for in- ternal bias = default; resistor from vcc to rset for reduced current consump- tion) 6 agnd analogue ground 7 gnd digital ground 8 dis global shutter p r e l i m i n a r y p r e l i m i n a r y 2 3 4 1 5 6 7 8
IC-LFM 64x1 linear image sensor rev a0.2, page 3/ 9 absolute maximum ratings beyond these values damage may occur; device operation is not guaranteed. item symbol parameter conditions unit no. min. max. g001 vdd digital supply voltage -0.3 6 v g002 vcc analogue supply voltage -0.3 6 v g003 v() voltage at si, clk, dis, rset, ao -0.3 vcc + 0.3 v g004 i() current in rset, ao -10 10 ma g005 vd() esd susceptibility at all pins hbm, 100 pf/1.5 k
4 kv g006 tj operating junction temperature -40 125 c thermal data operating conditions: vcc = vdd = 5 v 10% item symbol parameter conditions unit no. min. typ. max. t01 ta operating ambient temperature range see package speci?cation obga? lfm1c all voltages are referenced to ground unless otherwise stated. all currents ?owing into the device pins are positive; all currents ?owing out of the device pins are negative. p r e l i m i n a r y p r e l i m i n a r y
IC-LFM 64x1 linear image sensor rev a0.2, page 4/ 9 electrical characteristics operating conditions: vcc = vdd = 5 v 10%, rset = gnd, tj = -25...85 c unless otherwise noted item symbol parameter conditions unit no. min. typ. max. total device 001 vdd digital supply voltage range 4.5 5.5 v 002 vcc analogue supply voltage range 4.5 5.5 v 003 i(vdd) supply current in vdd f(clk) = 1 mhz tbd ma f(clk) = 5 mhz tbd ma 004 i(vcc) supply current in vcc 2 7 ma 005 vc()hi clamp voltage hi at si, clk, dis, rset vc()hi = v() vcc; i() = 1 ma 0.3 1.8 v 006 vc()lo clamp voltage lo at si, clk, dis, rset vc()hi = v() v(agnd); i() = -1 ma -1.5 0.3 v 007 vc()hi clamp voltage hi at ao vc()hi = v(ao) vcc; i(ao) = 1 ma 0.3 1.5 v 008 vc()lo clamp voltage lo at ao, vcc, vdd, gnd vc()lo = v() v(agnd); i() = -1 ma -1.5 -0.3 v photodiode array 201 a() radiant sensitive area 200 m x 56.40 m per pixel 0.01128 mm2 202 s( )max spectral sensitivity = 680 nm (see fig. 1 ) 0.5 a/w 203 ar spectral application range s( ar ) = 0.25 x s( )max (see fig. 1 ) 400 980 nm analogue output ao 301 vs()lo saturation voltage lo i() = 1 ma 0.5 v 302 vs()hi saturation voltage hi vs()hi = vcc v(), i() = -1 ma 1 v 303 k sensitivity = 680 nm 2.88 v/pws 304 v0() offset voltage integration time 1 ms, no illumination 400 800 mv 305 v0() offset voltage deviation during integration mode v0() = v(ao)t1 v(ao)t2, t = t2 t1 = 1 ms -250 50 mv 306 v() signal deviation during hold mode v0() = v(ao)t1 v(ao)t2, t = t2 t1 = 1 ms -150 150 mv 307 tp(clk- ao) settling time cl(ao) = 10 pf, clk lo ! hi until v(ao) = 0.98 x v(vcc) 200 ns power-on-reset 801 vccon power-on release by vcc 4.4 v 802 vccoff power-down reset by vcc 1 v 803 vcchys hysteresis vcchys = vccon vccoff 0.4 1 2 v bias current adjust rset 901 ibias() permissible external bias current 20 100 a 902 vref reference voltage i(rset) = ibias 2.5 3 3.5 v input interface si, clk, dis b01 vt()hi threshold voltage hi 1.4 1.8 v b02 vt()lo threshold voltage lo 0.9 1.2 v b03 vt()hys hysteresis vt()hys = vt()hi vt()lo 300 800 mv b04 i() pull-down current 10 30 50 a b05 fclk permissible clock frequency 5 mhz p r e l i m i n a r y p r e l i m i n a r y
IC-LFM 64x1 linear image sensor rev a0.2, page 5/ 9 optical characteristics: diagrams figure 1: relative spectral sensitivity operating requirements: logic operating conditions: vcc = vdd = 5 v 10%, tj = -25...85 c input levels lo = 0...0.45 v, hi = 2.4 v...vcc, see fig. 2 for reference levels item symbol parameter conditions unit no. min. max. i001 tset setup time: si stable before clk lo ! hi see fig. 3 50 ns i002 thold hold time: si stable after clk lo ! hi see fig. 3 50 ns figure 2: reference levels figure 3: timing diagram p r e l i m i n a r y p r e l i m i n a r y 400 10 20 30 40 50 60 70 80 90 100 600 800 1000 nm % t v 2.0v0.8v 2.4v 0.45v 0 1 input/output clksi tset thold
IC-LFM 64x1 linear image sensor rev a0.2, page 6/ 9 description of functions normal operation following an internal power-on reset the integration and hold capacitors are discharged and the sample and hold circuit is set to sample mode. a high signal at si and a rising edge at clk triggers a readout cycle and with it a new integration cycle. in this process the hold capacitors of pixels 1 to 63 are switched to hold mode immediately (snh = 1), with pixel 64 (snh64 = 1) following suit one clock pulse later. this special procedure allows all pixels to be read out with just 64 clock pulses. the integration ca- pacitors are discharged by a one clock long reset sig- nal (nrci = 0) which occurs between the 2 nd and 3 rd falling edge of the readout clock pulse (cf. figure 4). after the 63 pixels have been read out these are again set to sample mode (snh = 0), likewise for pixel 64 one clock pulse later (snh64 = 0). figure 4: readout cycle and integration sequence if prior to the 64 th clock pulse a high signal occurs at si the present readout is halted and immediately re-initiated with pixel 1. in this instance the hold ca- pacitors retain their old value i.e. hold mode prevails (snh/snh64 = 0). figure 5: restarting a readout cycle with more than 64 clock pulses until the next si signal, pixel 1 is output without entering hold mode; the out- put voltage tracks the voltage of the pixel 1 integration capacitor. p r e l i m i n a r y p r e l i m i n a r y snh snh64 nrci integrationszeit pixel 1?63 integrationszeit pixel 64 pix64 pix63 ... pix63 pix64 pix62 63 pix1 1 64 3 v(ao) clk si pix2 pix3 62 1 2 63 64 2 4 ... pix1 pix2 pix3 62 1 64 5 1 pix4 pix5 2 3 pix2 4 pix64 2 pix1 ... ... snh snh64 nrci 2 4 pix4 pix3 63 pix63 pix64 pix62 pix1 pix1 1 64 3 v(ao) clk si
IC-LFM 64x1 linear image sensor rev a0.2, page 7/ 9 figure 6: clock pulse continued without giving a new integration start signal operation with the shutter function integration can be halted at any time via pin dis, i.e. the photodiodes are disconnected from their corre- sponding integration capacitor when dis is high and the current integration capacitor voltages are main- tained. if this pin is open or switched to gnd the pixel photocurrents are summed up by the integration ca- pacitors until the next successive si signal follows. figure 7: de?ning the integration time via shutter input dis external bias current setting in order to reduce the power consumption of the device an external reference current can be supplied to pin rset which reduces the maximum readout frequency, however. to this end a resistor must be connected from vcc to rset. if this pin is not used, it should be connected to gnd. p r e l i m i n a r y p r e l i m i n a r y snh snh64 nrci integrationszeit 67 pix64 pix63 ... pix63 pix64 pix62 63 pix1 1 64 3 v(ao) clk si pix2 pix3 62 65 66 63 64 2 4 ... pix1 pix sample?c 5 6 dis integration integration disabled disabled integration enabled snh 1 nrci 2 ... 1 4 si clk 3 64 63
IC-LFM 64x1 linear image sensor rev a0.2, page 8/ 9 ic-haus expressly reserves the right to change its products and/or speci?cations. an info letter gives details as to any amendments and additions made to the relevant current speci?cations on our internet website www.ichaus.de/infoletter ; this letter is generated automatically and shall be sent to registered users by email. copying C even as an excerpt C is only permitted with ic-haus approval in writing and precise reference to source. ic-haus does not warrant the accuracy, completeness or timeliness of the speci?cation and does not assume liability for any errors or omissions in these materials. the data speci?ed is intended solely for the purpose of product description. no representations or warranties, either express or implied, of merchantability, ?tness for a particular purpose or of any other nature are made hereunder with respect to information/speci?cation or the products to which information refers and no guarantee with respect to compliance to the intended use is given. in particular, this also applies to the stated possible applications or areas of applications of the product. ic-haus conveys no patent, copyright, mask work right or other trade mark right to this product. ic-haus assumes no liability for any patent and/or other trade mark rights of a third party resulting from processing or handling of the product and/or any other use of the product. as a general rule our developments, ips, principle circuitry and range of integrated circuits are suitable and speci?cally designed for appropriate use in technical applications, such as in devices, systems and any kind of technical equipment, in so far as they do not infringe existing patent rights. in principle the range of use is limitless in a technical sense and refers to the products listed in the inventory of goods compiled for the 2008 and following export trade statistics issued annually by the bureau of statistics in wiesbaden, for example, or to any product in the product catalogue published for the 2007 and following exhibitions in hanover (hannover-messe). we understand suitable application of our published designs to be state-of-the-art technology which can no longer be classed as inventive under the stipulations of patent law. our explicit application notes are to be treated only as mere examples of the many possible and extremely advantageous uses our products can be put to. p r e l i m i n a r y p r e l i m i n a r y
IC-LFM 64x1 linear image sensor rev a0.2, page 9/ 9 ordering information type package order designation IC-LFM obga? lfm1c IC-LFM obga lfm1c for technical support, information about prices and terms of delivery please contact: ic-haus gmbh tel.: +49 (61 35) 92 92-0 am kuemmerling 18 fax: +49 (61 35) 92 92-192 d-55294 bodenheim web: http://www.ichaus.com germany e-mail: sales@ichaus.com appointed local distributors: http://www.ichaus.com/sales_partners p r e l i m i n a r y p r e l i m i n a r y
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