1/10 not for new design november 2000 this is information on a product still in production but not recommended for new designs. M27128A nmos 128 kbit (16kb x 8) uv eprom fast access time: 200ns extended temperature range single 5 v supply voltage low standby current: 40ma max ttl compatible during read and program fast programming algorithm electronic signature programming voltage: 12v description the M27128A is a 131,072 bit uv erasable and electrically programmable memory eprom. it is organized as 16,384 words by 8 bits. the M27128A is housed in a 28 pin window ce- ramic frit-seal dual-in-line package. the trans- parent lid allows the user to expose the chip to ultraviolet light to erase the bit pattern. a new pat- tern can then be written to the device by following the programming procedure. figure 1. logic diagram ai00769b 14 a0-a13 p q0-q7 v pp v cc M27128A g e v ss 8 1 28 fdip28w (f)
q2 v ss a3 a0 q0 q1 a2 a1 g q5 a10 e q3 a11 q7 q6 q4 a13 p a12 a4 v pp v cc a7 ai00770 M27128A 8 1 2 3 4 5 6 7 9 10 11 12 13 14 20 19 18 17 16 15 a6 a5 a9 a8 28 27 26 25 24 23 22 21 figure 2. dip pin connections symbol parameter value unit t a ambient operating temperature grade 1 grade 6 0 to 70 C40 to 85 c t bias temperature under bias grade 1 grade 6 C10 to 80 C50 to 95 c t stg storage temperature C65 to 125 c v io input or output voltages C0.6 to 6.25 v v cc supply voltage C0.6 to 6.25 v v a9 a9 voltage C0.6 to 13.5 v v pp program supply C0.6 to 14 v note: except for the rating "operating temperature range", stresses above those listed in the table "absolute maximum ratings" may c ause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions abov e those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for ex tended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant quality documents. table 2. absolute maximum ratings device operation the seven modes of operation of the M27128A are listed in the operating modes table. a single 5v power supply is required in the read mode. all inputs are ttl levels except for v pp and 12v on a9 for electronic signature. read mode the M27128A has two control functions, both of which must be logically satisfied in order to obtain data at the outputs. chip enable ( e) is the power control and should be used for device selection. output enable ( g) is the output control and should be used to gate data to the output pins, inde- pendent of device selection. assuming that the addresses are stable, address access time (t avqv ) is equal to the delay from e to output (t elqv ). data is available at the outputs after the falling edge of g, assuming that e has been low and the addresses have been stable for at least t avqv -t glqv . standby mode the M27128A has a standby mode which reduces the maximum active power current from 85ma to 40ma. the M27128A is placed in the standby mode by applying a ttl high signal to the e input. when in the standby mode, the outputs are in a high impedance state, independent of the g input. two line output control because eproms are usually used in larger mem- ory arrays, this product features a 2 line control function which accommodates the use of multiple memory connection. the two line control function allows: a. the lowest possible memory power dissipation, b. complete assurance that output bus contention will not occur. M27128A 2/10
for the most efficient use of these two control lines, e should be decoded and used as the primary device selecting function, while g should be made a common connection to all devices in the array and connected to the read line from the system control bus. this ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device. system considerations the power switching characteristics of fast eproms require careful decoupling of the devices. the supply current, i cc , has three segments that are of interest to the system designer: the standby current level, the active current level, and transient current peaks that are produced by the falling and rising edges of e. the magnitude of this transient current peaks is dependent on the capacitive and inductive loading of the device at the output. the associated transient voltage peaks can be sup- pressed by complying with the two line output control and by properly selected decoupling ca- pacitors. it is recommended that a 1 m f ceramic capacitor be used on every device between v cc and v ss . this should be a high frequency capacitor of low inherent inductance and should be placed as close to the device as possible. in addition, a 4.7 m f bulk electrolytic capacitor should be used between v cc and gnd for every eight devices. the bulk capacitor should be located near the power supply connection point. the purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of pcb traces. programming when delivered (and after each erasure for uv epprom), all bits of the M27128A are in the 1" state. data is introduced by selectively program- ming 0s" into the desired bit locations. although only 0s will be programmed, both 1s and 0s can be present in the data word. the only way to change a 0" to a 1" is by ultraviolet light erasure. the M27128A is in the programming mode when v pp input is at 12.5v and e and p are at ttl low. the data to be programmed is applied 8 bits in parallel, to the data output pins. the levels required for the address and data inputs are ttl. fast programming algorithm fast programming algorithm rapidly programs M27128A eproms using an efficient and reliable method suited to the production programming en- vironment. programming reliability is also ensured as the incremental program margin of each byte is mode e g pa9v pp q0 - q7 read v il v il v ih xv cc data out output disable v il v ih v ih xv cc hi-z program v il v ih v il pulse x v pp data in verify v il v il v ih xv pp data out program inhibit v ih xxxv pp hi-z standby v ih xxxv cc hi-z electronic signature v il v il v ih v id v cc codes out note: x = v ih or v il , v id = 12v 0.5%. table 3. operating modes identifier a0 q7 q6 q5 q4 q3 q2 q1 q0 hex data manufacturers code v il 00100000 20h device code v ih 10001001 89h table 4. electronic signature device operation (contd) M27128A 3/10
ai00827 2.4v 0.45v 2.0v 0.8v figure 3. ac testing input output waveforms input rise and fall times 20ns input pulse voltages 0.45v to 2.4v input and output timing ref. voltages 0.8v to 2.0v ac measurement conditions ai00828 1.3v out c l = 100pf c l includes jig capacitance 3.3k w 1n914 device under test figure 4. ac testing load circuit note that output hi-z is defined as the point where data is no longer driven. symbol parameter test condition min max unit c in input capacitance v in = 0v = 6 pf c out output capacitance v out = 0v = 12 pf note: 1. sampled only, not 100% tested. table 5. capacitance (1) (t a = 25 c, f = 1 mhz ) ai00771 taxqx tehqz data out a0-a13 e g q0-q7 tavqv tghqz tglqv telqv valid hi-z figure 5. read mode ac waveforms M27128A 4/10
symbol alt parameter test condition M27128A unit -2, -20 blank, -25 -3, -30 -4 min max min max min max min max t avqv t acc address valid to output valid e = v il , g = v il 200 250 300 450 ns t elqv t ce chip enable low to output valid g = v il 200 250 300 450 ns t glqv t oe output enable low to output valid e = v il 75 100 120 150 ns t ehqz (2) t df chip enable high to output hi-z g = v il 0 55 0 60 0 105 0 130 ns t ghqz (2) t df output enable high to output hi-z e = v il 0 55 0 60 0 105 0 130 ns t axqx t oh address transition to output transition e = v il , g = v il 0000ns notes: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or af ter v pp . 2. sampled only, not 100% tested. table 7. read mode ac characteristics (1) (t a = 0 to 70 c or C40 to 85 c; v cc = 5v 5% or 5v 10%; v pp = v cc ) symbol parameter test condition min max unit i li input leakage current 0 v in v cc 10 m a i lo output leakage current v out = v cc 10 m a i cc supply current e = v il , g = v il 75 ma i cc1 supply current (standby) e = v ih 35 ma i pp program current v pp = v cc 5ma v il input low voltage C0.1 0.8 v v ih input high voltage 2 v cc + 1 v v ol output low voltage i ol = 2.1ma = 0.45 v v oh output high voltage i oh = C400 m a 2.4 v note: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . table 6. read mode dc characteristics (1) (t a = 0 to 70 c or C40 to 85 c; v cc = 5v 5% or 5v 10%; v pp = v cc ) M27128A 5/10
symbol parameter test condition min max unit i li input leakage current v il v in v ih 10 m a i cc supply current 100 ma i pp program current e = v il 50 ma v il input low voltage C0.1 0.8 v v ih input high voltage 2 v cc + 1 v v ol output low voltage i ol = 2.1ma 0.45 v v oh output high voltage i oh = C400 m a 2.4 v v id a9 voltage 11.5 12.5 v note: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or af ter v pp . table 8. programming mode dc characteristics (1) (t a = 25 c; v cc = 6v 0.25v; v pp = 12.5v 0.3v) symbol alt parameter test condition min max unit t av pl t as address valid to program low 2 m s t qvpl t ds input valid to program low 2 m s t vphpl t vps v pp high to program low 2 m s t vchpl t vcs v cc high to program low 2 m s t elpl t ces chip enable low to program low 2 m s t plph t pw program pulse width (initial) note 2 0.95 1.05 ms t plph t opw program pulse width (overprogram) note 3 2.85 78.75 ms t phqx t dh program high to input transition 2 m s t qxgl t oes input transition to output enable low 2 m s t glqv t oe output enable low to output valid 150 ns t ghqz (4) t dfp output enable high to output hi-z 0 130 ns t ghax t ah output enable high to address transition 0ns notes: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or af ter v pp . 2. the initial program pulse width tolerance is 1 ms 5%. 3. the length of the over-program pulse varies from 2.85 ms to 78.95 ms, depending on the multiplication value of the iteration counter. 4. sampled only, not 100% tested. table 9. programming mode ac characteristics (1) (t a = 25 c; v cc = 6v 0.25v; v pp = 12.5v 0.3v) M27128A 6/10
tavpl valid ai00772 a0-a13 q0-q7 v pp v cc p g data in data out e tqvpl tvphpl tvchpl tphqx tplph tglqv tqxgl telpl tghqz tghax program verify figure 6. programming and verify modes ac waveforms ai00775b n = 1 last addr verify p = 1ms pulse ++n > 25 ++ addr v cc = 6v, v pp = 12.5v fail check all bytes v cc = 5v, v pp 5v yes no yes no yes no p = 3ms pulse by n figure 7. programming flowchart continually monitored to determine when it has been successfully programmed. a flowchart of the M27128A fast programming algorithm is shown on the last page. the fast programming algorithm utilizes two different pulse types: initial and over- program. the duration of the initial p pulse(s) is 1ms, which will then be followed by a longer overprogram pulse of length 3ms by n (n is equal to the number of the initial one millisecond pulses applied to a particular M27128A location), before a correct verify occurs. up to 25 one-millisecond pulses per byte are pro- vided for before the over program pulse is applied. the entire sequence of program pulses and byte verifications is performed at v cc = 6v and v pp = 12.5v. when the fast programming cycle has been completed, all bytes should be compared to the original data with v cc = 5 and v pp = 5v. program inhibit programming of multiple M27128As in parallel with different data is also easily accomplished. except for e, all like inputs (including g) of the parallel M27128A may be common. a ttl low pulse ap- plied to a M27128As e input, with v pp = 12.5v, will program that M27128A. a high level e input inhibits the other M27128As from being programmed. device operation (contd) M27128A 7/10
program verify a verify should be performed on the programmed bits to determine that they were correctly pro- grammed. the verify is accomplished with g = v il , e = v il , p = v ih and v pp at 12.5v. electronic signature the electronic signature mode allows the reading out of a binary code from an eprom that will identify its manufacturer and type. this mode is intended for use by programming equipment to automatically match the device to be programmed with its corresponding programming algorithm. this mode is functional in the25 c 5 c ambient temperature range that is required when program- ming the M27128A. to activate this mode, the programming equipment must force 11.5v to 12.5v on address line a9 of the M27128A. two identifier bytes may then be se- quenced from the device outputs by toggling ad- dress line a0 from v il to v ih . all other address lines must be held at v il during electronic signature mode. byte 0 (a0 = v il ) represents the manufac- turer code and byte 1 (a0 = v ih ) the device identifier code. for the stmicroelectronics M27128A, these two identifier bytes are given below. erasure operation (applies to uv eprom) the erasure characteristic of the M27128A is such that erasure begins when the cells are exposed to light with wavelengths shorter than approximately 4000 ?. it should be noted that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000 ? range. research shows that constant exposure to room level fluorescent lighting could erase a typical M27128A in about 3 years, while it would take approximately 1 week to cause erasure when exposed to direct sunlight. if the M27128A is to be exposed to these types of lighting conditions for extended periods of time, it is suggested that opaque labels be put over the M27128A window to prevent unintentional erasure. the recommended erasure procedure for the M27128A is exposure to short wave ultraviolet light which has wavelength 2537 ?. the integrated dose (i.e. uv intensity x exposure time) for erasure should be a minimum of 15 w-sec/cm 2 . the erasure time with this dosage is approximately 15 to 20 minutes using an ultra- violet lamp with 12000 m w/cm 2 power rating. the M27128A should be placed within 2.5cm (1 inch) of the lamp tubes during the erasure. some lamps have a filter on their tubes which should be re- moved before erasure. speed and v cc tolerance -2 200 ns, 5v 5% blank 250 ns, 5v 5% -3 300 ns, 5v 5% -4 450 ns, 5v 5% -20 200 ns, 5v 10% -25 250 ns, 5v 10% -30 300 ns, 5v 10% package f fdip28w temperature range 1 0 to 70 c 6 C40 to 85 c example: M27128A -2 f 1 ordering information scheme for a list of available options (speed, v cc tolerance, package, etc...) refer to the current memory shortform catalogue. for further information on any aspect of this device, please contact stmicroelectronics sales office nearest to you. M27128A 8/10
fdipw-a a2 a1 a l b1 b e1 d s e1 e n 1 c a ea e3 ? symb mm inches typ min max typ min max a 5.71 0.225 a1 0.50 1.78 0.020 0.070 a2 3.90 5.08 0.154 0.200 b 0.40 0.55 0.016 0.022 b1 1.17 1.42 0.046 0.056 c 0.22 0.31 0.009 0.012 d 38.10 1.500 e 15.40 15.80 0.606 0.622 e1 13.05 13.36 0.514 0.526 e1 2.54 C C 0.100 C C e3 33.02 C C 1.300 C C ea 16.17 18.32 0.637 0.721 l 3.18 4.10 0.125 0.161 s 1.52 2.49 0.060 0.098 ? 7.11 C C 0.280 C C a 4 15 4 15 n28 28 draw ing is not to scale fdip28w - 28 pin ceramic frit-seal dip, with window M27128A 9/10
M27128A 10/10 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2000 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. www.st.com
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