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| mp2617a, mp2617b 3a switching charger with nvdc power path management for single cell li+ battery mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 1 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. the future of analog ic technology description the mp2617a / mp2617b is a monolithic switch mode battery charger with power path management for single-cell li-ion batteries in a wide range of tablet and other portable devices. it integrates a synchronous buck regulator to provide regulated voltage for powering the system output and at the same time charging the battery. this device supports both usb and high power dc adapter input. in usb mode, the input current limit can be programmed to 450ma or 825ma via the logic pins to cover the usb2.0 and usb3.0 specifications. when the adapter input is present, the input current can also be limited in order to avoid overloading of the dc adapter. input current limit can be programmed up to 3a. the smart power path management allows mp2617a and mp2617b to regulate the system voltage for powering an external load and charging the battery independently and simultaneously. this allows immediate system operation even under missing or deeply discharged battery. when the input current limit is reached, the system load is satisfied in priority, then the charger will take the remaining current to charge the battery. additionally, the smart power path control allows an internal connection from battery to the system in order to supplement additional power to the load in the event the system power demand increases over the input limited power or the input is removed. the mp2617a / mp2617b features high integration with all the power switches included inside. no external mosfet, blocking diodes, or current sense resistor is required. two status monitor output pins are provided to indicate the battery charge status and power source status. other features include trickle charge, battery temperature monitoring, timer and thermal limiting regulation on chip. the mp2617a / mp2617b is available in qfn 3mmx4mm package. features ? 4v to 10v operating input voltage ? smart power path management ? five control loops: input current limit, input voltage limit, constant charge current, terminal battery control and thermal fold-back. ? 1.6mhz switching frequency ? programmable input current limit ? programmable charge current ? single input for usb and ac adapter ? cover usb2.0 and usb3.0 input specification ? fully integrated power switches ? no external blocking diode and sense resistor required ? charging operation indicator ? built-in programmable charging timer ? thermal limiting regulation on chip ? battery temperature monitor ? tiny package features small size. applications ? smart phone ? e-book ? gps ? portable media player ? portable hand-held solution ? tablet pc all mps parts are lead-free, halogen free, and adhere to the rohs directive. for mps green status, please visit mps website under quality a ssurance. ?mps? and ?the future of analog ic technology? are registered trademarks of monolithic power systems, inc.
mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 2 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical application mp2617a mp2617b 0 20 40 60 80 100 0 0.5 1 1.5 2 2.5 3 3.5 40 50 60 70 80 90 100 0123 mp2617 family table features mp2617a mp2617b battery charge full voltage 4.35v 4.2v mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 3 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. ordering information part number package top marking mp2617agl * qfn-20 (3mmx4mm) mp2617a MP2617BGL qfn-20 (3mmx4mm) mp2617b * for tape & reel, add suffix ?z (e.g. mp2617agl?z); package reference top view 1 2 3 4 5 6 78 910 11 12 13 14 15 16 17 18 19 20 bst sw in sw pgnd en m0 m1 chgok acok agnd sysfb sys batt iset ntc vcc vlim tmr ilim absolute maxi mum ratings (1) in, sw ......................................... -0.3v to +20v batt, sys ..................................... -0.3v to +6v bst ............................................... -0.3v to +26v all other pins .................................. -0.3v to +6v continuous power dissipation (t a = +25c) (2) qfn20 3mmx4mm..................................... 2.6w junction temperature ............................... 150 ? c lead temperature .................................... 260 ? c storage temperature.................?65c to 150c recommended operating conditions (3) supply voltage v in ........................... 4.5v to 10v operating junction temp. (t j ) .... -40c to +125c thermal resistance (4) ja jc qfn-20 (3mmx4mm) .............. 48 ...... 11 ... ? c/w notes: 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max) = (t j (max)-t a )/ ja . exceeding the maximum allowable powe r dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51-7, 4-layer pcb. mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 4 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. electrical characteristics v in = 5.0v, t a = 25 ? c, unless otherwise noted. parameters symbol condition min typ max units input power (in) in operating range v in 4.0 10 v in under voltage lockout threshold rising 3.65 3.8 3.95 v falling 3.35 3.5 3.65 v in vs. batt threshold rising 240 280 320 mv falling 40 70 120 mv bst voltage threshold v bst -v sw rising 2.55 2.9 3.25 v hysteresis 150 mv switching frequency 1.4 1.6 1.8 mhz input current limit i in usb2.0 mode 400 450 500 ma usb3.0 mode 750 825 900 ma default mode 1840 2000 2160 ma programmable mode, r ilim =23k (mp2617b) 1840 2000 2160 ma programmable mode, rilim=22.47k (mp2617a) 1840 2000 2160 ma programmable mode, rilim=48k (mp2617a) 900 950 1000 ma input current limit reference voltage v ilim 1.1 1.14 1.18 v high-side nmos on resistance r hds ( on ) include the block fet 120 130 m ? low-side nmos on resistance r l _ ds ( on ) 80 100 m ? high-side nmos peak current limit 3.8 4.8 5.8 a input voltage clamp threshold v vlim voltage on vlim 1.49 1.52 1.55 v input quiescent current i in charger enabled, usb2.0 mode 2.4 5 ma charger enabled, usb3.0 mode 2.8 5 ma charger enable, programmable mode 3.8 5 ma charger enabled, default mode 3.8 5 ma disabled, en=0v 3 5 ua sys to in reverse current blocking sys=sw=4.5v,vin=0v, monitor vin leakage 0.01 0.2 ua sys output (mp2617a) minimum sys regulation voltage v sys sys voltage @ v batt 3.4v, sysfb float 3.45 3.6 3.75 v sys regulation voltage v sys 3.4v mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 6 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. electrical characteristics (continued) v in = 5.0v, t a = 25 ? c, unless otherwise noted. parameters symbol condition min typ max units iset reference voltage 1.1 1.15 1.2 v battery uvlo rising 2.4 2.6 2.8 v falling 2.2 2.4 2.6 v idea diode regulation voltage v sys supplement mode v batt - 65mv mv batt leakage current i batt v batt =4.2v, sys float, v in =pgnd 20 30 a acok __________ , chgok _____________ acok __________ , chgok _____________ pin output low voltage sinking 5ma 270 350 mv acok __________ ,chgok _____________ pin leakage current connected to 3.3v 0.1 0.5 a timer trickle charge time c tmr =0.1f, i chg =1a 45 min total charge time c tmr =0.1f, i chg =1a 6.5 hour negative temperature coefficient (ntc) control ntc low temp rising threshold v thl r ntc =ncp18xh103f 0c 63 65 67 %v cc hysteresis on low temp threshold 35 mv ntc high temp falling threshold v thh r ntc =ncp18xh103f, 50c 32 33.5 35 %v cc hysteresis on high temp threshold 70 mv vcc supply vcc uvlo rising 3.15 3.35 3.55 v falling 2.8 3 3.2 v vcc output voltage 0ma mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 7 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. electrical characteristics (continued) vin = 5.0v, ta = 25 ? c, unless otherwise noted. parameters symbol condition min typ max units protection thermal limit temperature 120 c thermal shutdown 150 c mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 8 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical performanc e characteristics v in = 5.0v, v batt = full range, default mode, i in limit=2a, v sys =4.4v, r6 and r7 are float, i chg =2a, v in clamp=4.5v, l = 1.2 h, t a = +25oc, test in mp2617b, unless otherwise noted. mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 9 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical performanc e characteristics (continued) v in = 5.0v, v batt = full range, default mode, i in limit=2a, v sys =4.4v, r6 and r7 are float, i chg =2a, v in clamp=4.5v, l = 1.2 h, t a = +25oc, test in mp2617b, unless otherwise noted. mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 10 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical performanc e characteristics (continued) v in = 5.0v, v batt = full range, default mode, i in limit=2a, v sys =4.4v, r6 and r7 are float, i chg =2a, l = 1.2 h, t a = +25oc, test in mp2617b, unless otherwise noted. mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 11 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical performanc e characteristics (continued) v in = 5.0v, v batt = full range, default mode, i in limit=2a, v sys =4.4v, r6 and r7 are float, i chg =2a, l = 1.2 h, t a = +25oc, test in mp2617b, unless otherwise noted. mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 12 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical performanc e characteristics (continued) v in = 5.0v, v batt = full range, default mode, i in limit=2a, v sys =4.4v, r6 and r7 are float, i chg =2a, l = 1.2 h, t a = +25oc, test in mp2617b, unless otherwise noted. mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 13 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. pin functions package pin # name description 1 bst bootstrap. a capacitor is connected betwee n sw and bst pin to form a floating supply across the power switch driver to drive the power switch?s gate above the supply voltage. 3 in power input of the ic from adapter or usb. 2,4 sw switch output. 5 pgnd power ground. 6 en _____ function logic control pin of the ic. logic low to enable the part and logic high to disable the part. 7 m0 mode select input pin, in combination with m1 pin, setting the input current limit mode. 8 m1 mode select input pin, in combination with m0 pin, setting the input current limit mode. 9 chgok _____________ open drain output. it is pulled low during chargi ng. and it is pulled high through an external resistor to vcc to indicate charge completed. 10 acok __________ open drain output. it is pulled low to indicate the presence of a valid input power supply. otherwise, it is pulled high through an external re sistor to vcc to indicate invalid input or removed input. 11 agnd analog ground. 12 sysfb sys voltage program pin. connect a resistor divider from the pin to sys and agnd to program the system output voltage. leave the pin float to disable the function. 13 sys dc-dc regulator output to power the system load and charge the battery. 14 batt positive battery terminal. 15 iset charge current program pin. a resistor from the pin to agnd can program the charge current during cc charge. float the pi n will disable the charge function. 16 ntc thermistor input. connect a resistor from this pi n to vcc and the thermistor from this pin to ground. the thermistor is usually inside the battery pack. 17 ilim input current limit program pin. a resistor from the pin to agnd can program the input current limit with adapter input. 18 tmr set timer out period. connect tmr pin to agnd to disable the internal timer. 19 vlim input voltage clamp program pin. 20 vcc supply voltage of the ic. mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 14 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. operation driver in sw c l hsg lsg bst sys v bat x2 charge pump batt sys ea ea sysfb sysfb1 max(a,b) vbatt+200mv eao converter control 4 0 mo battfb vref ilim m 1 m 0 trim sys batt ideal diode regulation vth battery switch current limit iset vin 3.5 v coarse ldo & 3.0 v uvlo en vcc 4.5 v ldo vbg 3 . 8 v uvlo vbg vin uvlo gnd ntc tmr acok chgok en en 1.5v eao vref_cc cc/ cv linear charger vlim 3.6v sysfb1 sysfb battfb iref input current limit reference selector charger control & chip logic bandgap & bias ea sysfb vbg figure 1?function block diagram mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 15 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. introduction the mp2617a and mp2617b is a switching charger ic, with integrated smart power path management for powering the system and charging a single cell battery simultaneously and independently. the mp2617a and mp2617b includes input dc- dc step down converter for wide range of dc sources and usb inputs. it has precision average input current limit to make maximum use of the allowable input power. this feature allows fast charging when powering from an usb port, and ensures the input current never exceeds the input power specification especially when the input power comes from a usb port. additionally, the input current limit threshold can be programmed by logic inputs or a resistor to ground from the ilim pin. the mp2617a and mp2617b implements an on- chip 40m ? mosfet which works as a full- featured linear charger with trickle charge, high accuracy constant current and constant voltage charge, charge termination, auto recharge, ntc monitor, built-in timer control, charge status indication, and thermal protection. the charge current can be programmed by an external resistor connected from the iset pin to agnd. the ic limits the charge current when the die temperature exceeds 120c. the 40m ? mosfet works as an ideal diode to connecting the battery to the system load when the input power is not enough to power the system load. when the input is removed, the 40m ? mosfet is turned on allowing the battery to power up the system. with smart power path management, the system load is satisfied in priority then the remaining current is used to charge the battery. the mp2617a and mp2617b will reduce charging current or even use power from the battery to satisfy the system load when its demand is over the input power capacity. figure 1 shows the function block diagram of the mp2617a and mp2617b. dc-dc step down converter the dc-dc converter is a 1.6mhz constant frequency step-down switching regulator to provide the input power to the sys, which drives the combination of the system load and battery charger. the regulator contains input current measurement and control scheme to ensure the average input current remains below the level programmed via ilim pin or logic inputs m0&m1. this meets the adapter capacity limit or stays in compliance with usb specification. when the input voltage is higher than uvlo and 320mv higher than the battery voltage, input voltage ok signal is active (acok ?????? turns low) and the dc-dc converter soft-starts. if the input power is sufficient to supply the combination of the system load and battery charger, and the input current limit loop is not triggered. the converter output voltage v sys will be regulated: 1) if batt>3.4v, v sys is approximately 0.2v above the battery voltage to minimize the power loss of the battery charger during fast charging. 2) if batt<3.4v, v sys is fixed at 3.6v to power the system immediately even when a drained battery is inserted to be charged. figure 2 shows the relationship of v sys vs. v batt. system voltage can also be regulated to any value between 3.6v to 4.4v in mp2617b (3.6v to 4.63v in mp2617a) by using a resistor divider on the sysfb pin. this is shown as r6 and r7 in figure 10. if the sysfb is left floating, the system program is invalid, and v sys is regulated as figure 2. the converter adopts fixed off-time control to extend the duty cycle (close to 100%) when the input of the converter is close to v sys. 4.4v 4.2v 3.6v 4.2v 3.4 v 200mv v batt v sys figure 2 ? mp 2617b sys regulation output mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 16 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. close to 100% duty operation, bst refresh operation makes sure the driver voltage of the hs will be charged by turning on the ls until negative il hit about 400ma. if the input power is insufficient to supply the combination of the system load and battery charger, the dc-dc converter will limit the total power requirement by restricting the input voltage, input current and the peak current through the mosfet. the power path management will reduce the charge current to satisfy the external system load in priority. according to this feature, the usb specification is always satisfied first. even if the charge current is set larger than the usb input current limit, the real charge current will be reduced as needed. input limit state if the input power is insufficient to supply the combination of the system load and battery charger, the mp2617a and mp2617b implements three input limit control loops to reduce the charge current and satisfy the external system load in priority. the input in this case might be limited as follows: input current limit, input voltage limit and dc-dc peak current limit. input current limit: when the system current is higher than the programmed input current limit the input current limit loop takes the control of the converter and regulates the input current at constant value. when the battery voltage is over 3.4v, the output voltage (v sys ) will drop down according to the increase of the system current, and the charge current drops down after the batt-to-sys switch (40m ? mosfet) is fully on according to v sys dropping down. during this process, the system vo ltage is slightly higher than v batt . when the battery voltage is lower than 3.4v, to maintain the minimum system voltage and ensure the system operation, the input current limit control will pull down the charge current directly to reduce the load of the converter so that the system current is satisfied in priority. input voltage limit: a resistor divider from in pin to vlim pin to agnd is used for the input voltage limit control. when the voltage on vlim pin hits the reference voltage of 1.52v, the output of the input voltage limit error amplifier will drop in to control the operation duty. in this mode, the input voltage will be clamped according to the value set by the resistor divider. the control to the system voltage and charge current is the same as the one explained in the input current limit. charge current drops down to satisfy the system current request first. this feature provides a second protection to the input power and ensures the safe operation of the input adapter. even if a wrong adapter is inserted, the mp2617a and mp2617b can continue operation, providing the maximum power to its load. user can program the input voltage limit value through the resistor divider from in to vlim to agnd. peak current limit: the peak current of the high side switch of the dc-dc converter is sensed during every cycle, it is compared to the reference 4.8a. if the peak current hits the threshold, the peak current limit mode is triggered. the control of the charge current is the same with the above two limits. input current limit setting the current at ilim is a precise fraction of the adapter input current. when a programming resistor is connected from ilim to agnd, the voltage on ilim represents the average input current of the pwm converter. and the input current approaches the programmed limit, ilim voltage reaches 1.14v. the average input current limit can be set through the resistor connecting from ilim to agnd according to the following expression: in_lim ilim x i=1.14 (ma) r(k ? ) ? x varies under different charge current setting, following is a table of x selection to set the charge current: table1.a - mp2617b charge current setting table input current limit (ma) x selected resistor(k ? ) 490 40962 95.3 770 40796 60.4 970 40842 48 1550 40653 29.9 2000 40350 23 2990 40128 15.3 mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 17 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. table1.b - mp2617a charge current setting table input current limit (ma) x selected resistor(k ? ) 480 40126 95.3 750 39737 60.4 950 40000 48 1515 39735 29.9 1950 39342 23 2910 39055 15.3 add following curve shows the tested current distribution under different charge current setting of mp2617b based on table1.a. figure 3 ? input current limit vs. r lim when usb input, the input current limit is set internally and the programmed value is invalid. the mp2617a and mp2617b provides typical of 450ma input current limit for usb2.0 specification and a typical of 825ma for usb3.0 specification respectively. the user can choose to set the input current limit through the two logic pins m0 and m1 as shown in table 2 according to its input specification. when both m0 and m1 pins are float, they are pulled to the logic high, under this condition, the input current is limited to a default value of 2a. table 2 D input current limit setting m0 m1 mode low low usb2.0 mode low high usb3.0 mode high low programmable mode high/float high/float default mode input voltage limit setting the input voltage can be limited at a value set by a resistor divider from in pin to vlim pin to agnd according to the following expression (typical application circuit): in_lim r1+r2 v =1.52 (v) r2 ? when the voltage on vlim pin drops and hits the reference voltage 1.52v, the input voltage will be clamped to the setting value. battery charger the mp2617a and mp2617b completes charge operation consist of trickle charge, automatic charge termination, charge status indication, timer control, ntc indication, automatic recharge, and thermal limiting. when the pwm converter is out of soft start, the battery charge cycle begins, the mp2617a and mp2617b first determines if the battery is deeply discharged. if the battery voltage is lower than the trick charge threshold (typical 3.0v), the battery charger starts in ?trickle charge mode?. the trickle charge current is limited to 10% of the programmed charge current until the battery voltage reaches 3.0v. if the charge stays in the ?trickle charging mode? for longer than 45 minutes, the ?timer out? condition is triggered, the charge is terminated and chgok _____________ will start blinking to indicate that the battery is unresponsive. when the battery voltage is above 3.0v, the charger is operating at ?constant current mode.? the current delivered to the battery will try to reach the value programmed by the iset pin. depending on the available input power and system load conditions, the battery charger may or may not be able to charge at the full programmed rate. the system load is always satisfied first over the battery charge current. if the system load requirement is low, the battery can be charged at full constant current. when the battery voltage reaches the battery full threshold, the charger enters the ?constant voltage mode? operation. end of charge (eoc) and indication in constant voltage charge mode, the battery voltage is regulated at 4.2v (mp2617b) and 4.35v (mp2617a) (when sysfb is float or sys mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 18 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. is programmed higher than battery full threshold) and the charge current decreases naturally. once the charge current hits the battery full threshold i bf (1/10 programmed charge current), the battery is fully charged and charge cycle is terminated. if the charge current drops below i bf because of any limit condition, the mp2617a and mp2617b will come out of cv mode, and the charge full detection is invalid. a safe timer starts at the beginning of each new charge cycle and it monitors if the whole charge period is within the programmed time limit. after each charge cycle, when the battery is indicated as full, the timer counter will be reset. if the time is expired while the charging is still on going, the timer will force the mp2617a and mp2617b to terminate charging chgok _____________ is blinking to indicate the fault condition. if system voltage is programmed lower than 4.2v (mp2617b) and 4.35v (mp2617a) by the resistor divider at the sysfb pin, the battery will be charged most close to v sys until the charge current reaches the i bf threshold. automatic recharge once the battery charge cycle is completed, the mp2617a and mp2617b turns off indicating the battery full status. during this process, the battery power may be consumed by the system load or self discharge. if the input power is always on, to ensure the battery not to be exhausted, the new charge cycle will automatically begin when the battery voltage falls below the auto-recharge threshold v rchg when the sysfb is float, and 50mv lower if the sysfb is connected to a resistor divider. the timer will re-start when the auto-recharge cycle begins. during the charge off state when the battery is fully charged, if the input power is recycled, or the en signal is refreshed, the charge cycle will re-start and the timer will refresh even if the battery voltage is above the auto-recharge threshold. charge current setting the charge current of the mp2617a and mp2617b is programmed using a single resistor from iset pin to ground. the program resistor and charge current are calculated using the following equations: chg set 1800 i1.15 (ma) r(k) ?? ? at either constant current mode or constant voltage mode, the voltage at the iset pin is proportional to the actual charge current delivered to the battery, i batt . the charge current can be calculated by monitoring the iset pin voltage with the following formula: chg iset batt i 1.15 v = i additionally, the actual battery charge current may be lower than the programmed current due to limited input power available and prioritization of the system load. battery charge full current threshold i bf is set internally at 10% of the programmed charge current. however, i bf has a 150ma maximum limit which can not be exceeded. logic control the mp2617a and mp2617b has two separate enable control pins. en _____ is a logic control pin that controls the operation of the whole ic. when en _____ is low, the ic is enabled and the pwm converter output powers the system and the charger. when en _____ is high, both the pwm converter and the charger are disabled. the batt to sys switch turns fully on to connect the battery to power the system. the iset pin can be also used to control the operation of the charger. setting iset pin floating will disable the charger function while the output of pwm converter will continue supply power to system. on the other hand, a resistor from iset to agnd will enable the charging at the programmed charge current. the logic control of the iset pin of the mp2617a and mp2617b can be realized as figure 4. in this way, the user can choose logic low to be ?off? signal or logic high to be ?on? signal with a n- mosfet. mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 19 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. iset r iset off on figure 4? iset logic control input power status indication (acok __________ ) an internal under voltage lockout circuit monitors the input voltage and keeps the ic in off state until the input rises over the rising threshold (3.8v). when the input voltage decreases below threshold (3.5v), the ic will turn off, and the system load will be powered by the battery automatically. acok __________ is an open-drain, active- low output that indicates the status of input power. the input is considered valid when the input voltage is over the uvlo rising threshold, and 310mv higher than the battery voltage to ensure both the converter and the charger can operate normally. if the input voltage from an adapter or from a usb port is indicated ok, acok __________ will turn low. during en _____ off or thermal shutdown conditions, the acok __________ turns high to indicate no power is provided by the input to the system. the acok __________ signal indicates if input supplies power to the system load or not. any other condition can not affect the acok __________ indication as long as the input power is present. charge status indication (chgok _____________ ) chgok _____________ is an open-drain, active-low output that indicates the status of charge. chgok _____________ will be low during normal charging operation, turn high after charge full, and blink if a fault condition happens including ntc fault (battery temperature invalid) and timer out (bad battery). in the event of a fault condition, chgok _____________ switches at 6hz with the 50% duty cycle and enter ?blinking? mode. the user should check the application circuit to find out the root cause of the fault condition if the ?blinking? signal is asserted. for no battery condition, chgok _____________ is blinking according to the transition between charging and charge full. the blinking frequency is determined by the cycle of charge and discharge of the output capacitor. when the charge current to the battery is low or in the event the battery is in supplement mode caused by the insufficient input power, chgok _____________ keeps low to avoid providing false charge full indication. table 3 shows the acok __________ and chgok _____________ status under different charge conditions. table 3 D charger status indication acok chgok charger status low low in charging, supplement mode low high end of charge, iset disable charger only. low blinking at 6hz ntc fault, timer out high high v in absent, en disable, thermal shutdown timer setting the mp2617a and mp2617b uses an internal timer to terminate charge if the timer times out. the timer duration is programmed by an external capacitor at the tmr pin and related to the real charge current. the trickle mode charge time is: tmr trickle _ tmr c t45(min) 0.1 f ?? chg (i 1a ) ? the total charge time is: tmr total_tmr c t6.5(hr) 0.1 f ?? chg (i 1a ) ? mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 20 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. if charge is stopped due to high system load, the timer is temporarily suspended. this feature avoids indicating a false trigger indication for bad battery indication when there is little charge current delivered to the battery as a result of the insufficient input power. when the timer out condition occurs, the mp2617a and mp2617b terminates the charge at once and chgok _____________ blinks to indicate the fault status. if one of the following events happens, the timer is refreshed and the mp2617a and mp2617b re- starts the charge cycle. ? input re-startup ? refresh en _____ /iset signal ? auto-recharge ntc thermistor the ntc pin allows mp2617a and mp2617b to sense the battery temperature using the negative thermal coefficient (ntc) thermistor usually available in the battery pack to ensure safe operating environment of the battery. a resistor with appropriate value should be connected from vcc to ntc and the ntc resistor is from ntc pin to agnd. the voltage on ntc pin is determined by the resistor divider whose divide ratio as the different resistance of the ntc thermistor depends on the ambient temperature of the battery. the mp2617a and mp2617b has an internal ntc voltage comparator to set the upper and lower limit of the divide ratio. if ntc pin voltage falls out of this range it means the temperature is outside the safe operating range, as a result, the mp2617a and mp2617b will stop charging and report it on indication pins. charging will automatically resume after the temperature falls back into the safe range. thermal protection the mp2617a and mp2617b implements thermal protection to prevent the thermal damage to the ic or surrounding components. an internal thermal sense and feedback loop will automatically decrease the charge current when the die-temperature rises to about 120 o c. this function is referred as charge current thermal fold-back. this feature protects the mp2617a and mp2617b from excessive temperature due to high power operation or high ambient thermal conditions. another benefit of this feature is charge current can be set according to the requirement rather than worst-case conditions for a given application with the assurance of safe operation. the mp2617a and mp2617b will stop charging if the junction temperature rises above 150 o c as the ic enters thermal shutdown protection. ideal diode mode if the system current requirement increases over the preset limit of the pwm converter, the additional current will be drawn from the battery via the batt-to-sys switch. to avoid very large currents being drawn from the battery which might affect the reliability of the device, the mp2617a and mp2617b controls the charge switch to work at the ideal diode mode regulating v sys to v batt -65mv when v sys is 40mv lower than v batt is detected. only when v sys is 40mv higher than v batt , the charger switch exits the ideal diode mode, and the charge cycle softly restarts. v batt +40mv enable ideal diode mode v sys disable ideal diode mode v batt -40mv figure 5?ideal diode mode enable/disable battery discharge protection when the input power is removed or invalid, the system load will draw power from the battery via the battery switch. under this condition, the battery switch is fully on to minimize the power loss. the mp2617a and mp2617b integrates battery discharge protection. if the battery discharge current is larger than the discharge current limit threshold i dis (5a), the current will be regulated at the preset limited value. and if the current increases further, the sys voltage starts to decrease. when v sys drops to about 800mv lower than v batt , sys short condition is detected. under this condition, the discharge current is limited at 85ma. in the event of a short from system to gnd the discharge current from the battery to the system is also limited to 85ma. mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 21 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. furthermore, battery voltage uvlo is always monitored. if the battery voltage is lower than the battery uvlo threshold, the battery switch is turned off immediately. this feature makes sure the battery from over-discharged. dynamic power path management (dppm) in the presence of a valid input source, the pwm converter will supply the current to both the system and the battery charger. the voltage v sys is regulated based on the value of the battery voltage. when v batt is higher than 3.4v, v sys is regulated 200mv above v batt to charge the battery. when v batt is lower than 3.4v, to ensure the system can still be powered up even with a drained battery connected, v sys is regulated at constant 3.6v. when the input source is overloaded, either the current exceeds the input current limit or the voltage falls below the input voltage limit, the mp2617a and mp2617b then reduces the charge current until the input current falls below the input current limit and the input voltage rises above the input voltage limit. if the system current increases beyond the power allowed by the input source, additional power will be drawn from the battery via an on-chip 40m ? mosfet working as an ideal diode. additionally, if the input source is removed, the mp2617a and mp2617b will turn on the 40m ? mosfet allowing the battery to power the system load to keep the operation of the portable device. operation flow chart taking the mp2617b for example, figure 6 shows the operation flow chart of the mp2617b while figure 7 shows the operation process. mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 22 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. v in >3.0v? por chip enable? no enable bg yes, por="0" yes bgok ="1" bgok ="0" no por ="1" enable vref ldo yes, uvlo="0" no, uvlo="1" v in >v batt +310mv? yes enable dc-dc dc-dc soft starts v sys_ref =max(v batt + 200mv,3.6v) dc-dc starts ready? enable battery charger v sys >v batt ? iset ok? batt-to-sys switch turns off yes no yes no v batt >v batt_uvlo ? yes system shuts down no power to system battery power system enable discharge limit no no v in >v in_uvlo (v th )? mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 23 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. any limit condition triggered? no yes v batt >3.0v? no cc/cv charge i chg =i bf ? yes charge full, eoc=1 tmr off, clear the counter dc-dc keeps work v batt mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 25 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. application information component selection setting the input current limit connect a resistor from the ilim pin to agnd to program the input current limit for different input ports. the relationship between the input current limit and setting resistor is as table 1 and figure 3 shown. for usb input, the input current limit is set by the m0 and m1 logic, the setting resistor by ilim pin is invalid. setting the charge current r iset connecting from the iset pin to agnd sets the charge current (i chg ). the relationship between the charge current and setting resistor is as following: chg set 1800 i1.15 (ma) r(k) ?? ? (2) assume i chg =2a, thus: r iset =1.05k ? . usually in usb mode, the charge current is always set over the usb input limit specification. then the mp2617a and mp2617b regulates the input current constant at the limitation value. thus the real cc charge current is not the setting value, it varies with different input and battery voltages. the maximum cc charge value can be calculated as: ) a ( v i v i tc ilim in max _ cc ? ? ? ? (3) where v tc is trickle charge threshold (3v) and is the current charge efficiency. assume v in =5.5v, i ilim =1.5a, =83%, thus i cc_max =2.28a. figure 8 shows a calculating charge current curve by limiting the input current limit based on mp2617b. 1a 2a 3a 3v 4.2v charge current battery voltage i i n _ l i m = 2 a i i n _ l i m = 1 . 5 a i u s b 3 . 0 = 0 . 9 a i u s b 2 . 0 = 0 . 4 5 a i cc_max figure 8?i chg variation with different input current limit setting the input voltage limit the input clamp voltage is set using a resistive voltage divider from the input voltage to vlim pin. the voltage divider divides the input voltage down to the limit voltage by the ratio: (v) r2 + r1 r2 v = v in_lim vlim (4) thus the input voltage is: (v) r2 r2 + r1 v = v vlim in_lim (5) the voltage clamp reference voltage v vlim is 1.52v, and a typical value for r2 can be 10k ? . with this value, r1 can be determined by: (v) v v - v r2 = r1 vlim vlim in_lim (6) for example, for a 4.65v input limit voltage, r2 is 10k ? , and r1 is 20.6k ? . setting the system voltage the system voltage can be regulated to any value between 3.6v to 4.4v by the resistor divider on sysfb pin as r6 and r7 in figure 10. 7 r 7 r 6 r v v ref _ sys sys ? ? ? (7) where v sys_ref is 1.152v, the reference voltage of sys. with a typical value for r7, 10k ? , r6 can be determined by: mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 26 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. ) v ( v v v 7 r 6 r ref _ sys ref _ sys sys ? ? ? (8) for example, for a 4.2v system voltage, r7 is 10k ? , and r6 is 26.5k ? . selecting the inductor inductor selection trades off among cost, size, and efficiency. a lower inductance value corresponds to a smaller size, but results in higher ripple currents, higher magnetic hysteretic losses, and higher output capacitances. choosing a higher inductance value benefits from lower ripple current and smaller output filter capacitors, but results in higher inductor dc resistance (dcr) loss. from a practical standpoint, the inductor ripple current does not exceed 30% of the maximum load current under worst cases conditions. for the mp2617a and mp2617b operating with a typical 5v input voltage, the maximum inductor current ripple occurs at the corner point between trickle charge and cc charge (v batt =3v). estimate the required inductance as: ) mhz ( f v v i v v l s in batt max _ l batt in ? ? ? ? ( ? h) (9) ) 2 ripple % 1 ( i i ) max ( load peak ? ? ? (ma) (10) where v in , v batt , and f s are the typical input voltage, the tc to cc charge threshold, and the switching frequency, respectively. ? i l_max is the maximum inductor ripple current, which is usually 30% of the cc charge current. for i chg =2a, v in =5v, v batt =3v and f s =1.6mhz, the calculated inductance is 1.3h. the maximum inductor peak current exceeds 2.3a. to optimize efficiency, chose an inductor with a dc resistance less than 50m ? . choose the inductor 7447745012 from wurth with ratings at l=1.2h/4.6a /21m ? . for emi consideration and high current application, a larger inductor such as 2.2h is recommended to be applied. selecting the input capacitor the input capacitor c1 from the typical application circuit absorbs the maximum ripple current from the pwm converter, which is given by max _ in tc max _ in tc max _ cc max _ rms v ) v v ( v i i ? ? ? ? (a) (11) for i cc_max =2a, v tc =3v, v in_max =14v, the maximum ripple current is 1a. select the input capacitors so that the temperature rise due to the ripple current does not exceed 10c. use ceramic capacitors with x5r or x7r dielectrics because of their low esr and small temperature coefficients. for most applications, use a 22f capacitor. selecting the output capacitor the output capacitor c2 from the typical application circuit is in parallel with the sys load. c2 absorbs the high-frequency switching ripple current and smoothes the output voltage. its impedance must be much less than that of the system load to ensure it properly absorbs the ripple current. use a ceramic capacitor because it has lower esr and smaller size that allows us to ignore the esr of the output capacitor. thus, the output voltage ripple is given by: % l f 2 c 8 v v 1 v v r 2 s in sys sys sys ? ? ? ? ? ? ? ? (12) in order to guarantee the 0.5% system voltage accuracy, the maximum output voltage ripple must not exceed 0.5% (e.g. 0.1%). the maximum output voltage ripple occurs at the minimum system voltage and the maximum input voltage. for v in =14v, v sys_min =3.6v, l=1.2h, f s =1.6mhz, ? r =0.1%, the output capacitor can be calculated as: r l f 8 v v 1 2 c 2 s in min _ sys ? ? ? ? ? ? (13) we can then choose a 22f ceramic capacitor. resistor choose for ntc sensor figure 9 shows an internal resistor divider reference circuit to limit the low temperature threshold and high temperature threshold at 65%vcc and 33.5%vcc, respectively. for a given ntc thermistor, select appropriate r t1 and r t2 to set the ntc window. mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 27 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. t2 ntc_cold th_low t1 t2 ntc_cold r//r v rr//r vcc ? ? (14) th_high t2 ntc_hot t1 t2 ntc_hot v r//r r r //r vcc ? ? (15) r ntc_hot is the value of the ntc resistor at high temperature of the required temperature operation range, and r ntc_cold is the value of the ntc resistor at low temperature. the two resistors, r t1 and r t2 , allow the high temperature limit and low temperature limit to be programmed independently. with this feature, the mp2617a and mp2617b can fit most type of ntc resistor and different temperature operation range requirements. r t1 and r t2 values depend on the type of the ntc resistor. for example, for the thermistor ncp18xh103, it has the following electrical characteristic: at 0c, r ntc_cold = 27.445k ? ; at 50c, r ntc_hot = 4.1601k ? . the following equations are derived assuming that the ntc window is between 0c and 50c. according to the above equations (14) and (15), th_low v vcc and th_high v vcc from the ec table to calculate r t1 =7.15k ? and r t2 =25.5k ? . ntc vcc low temp threshold high temp threshold r ntc r t1 r t2 v th_low v th _high figure 9?ntc function block pcb layout guideline it is important to pay special attention to the pcb layout to meet specified noise, efficiency and stability requirements. the following design considerations can improve circuit performance: 1) route the power stage adjacent to their grounds. aim to minimize the high-side switching node (sw, inductor), trace lengths in the high-current paths and the current sense resistor trace. keep the switching node short and away from all small control signals, especially the feedback network. place the input capacitor as close as possible to the in and pgnd pins. place the output inductor close to the ic and connect the output capacitor between the inductor and pgnd of the ic. 2) for high-current applications, the balls for the power pads (in, sw, sys, batt and pgnd) should be connected to as much copper in the board as possible. this improves thermal performance because the board conducts heat away from the ic. 3) the pcb should have a ground plane connected directly to the return of all components through vias (two vias per capacitor for power-stage capacitors, one via per capacitor for small-signal components). it is also recommended to put vias inside the pgnd pads for the ic, if possible. a star ground design approach is typically used to keep circuit block currents isolated (high-power/low-power small-signal) which reduces noise-coupling and ground-bounce issues. a single ground plane for this design gives good results. with this small layout and a single ground plane, there is no ground-bounce issue, and having the components segregated minimizes coupling between signals. mp2617a, mp2617b ? single cell switch ing charger with power path mp2617a, mp261 7b rev. 1.22 www.monolithicpower.com 28 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical application circuits battery l chgok acok ntc en gnd tmr batt bst sw mp 2617 c4 c6 m1 /usb input in m0 vcc c1 r ilim vlim sys iset r iset c2 c3 sys load r3 r ntc c5 v bat ilim r1 r2 r4 r5 sysfb r6 r7 off on adapter figure 10?typical charge application circuit with v sys programmed by sysfb pin l chgok acok ntc en gnd tmr batt bst sw mp2617 c4 c6 m1 /usb input in m0 vcc c1 r ilim vlim sys iset r iset c2 c3 sys load r3 r ntc c5 ilim r1 r2 r4 r5 sysfb r6 r7 off on adapter figure 11?application with charger disabled under no battery condition mp2617a, mp2617b ? single cell switch ing charger with power path notice: the information in this document is subject to change wi thout notice. users should warra nt and guarantee that third party intellectual property rights are not infringed upon w hen integrating mps products into any application. mps will not assume any legal responsibility for any said applications. mp2617a, mp2617b rev. 1.22 www.monolithicpower.com 29 6/29/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. package information qfn-20 (3mmx4mm) side view bottom view note: 1) all dimensions are in millimeters . 2) exposed paddle size does not includ e mold flash. 3) lead coplanarity shall be 0.10 millimeters max . 4) jedec reference is mo -220. 5) drawing is not to scale. pin 1 id marking top view pin 1 id index area recommended land pattern pin 1 id 0.10 x 45? typ 0.10 x 45? |
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