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ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 1/ 26 features fully differential 3-channel signal conditioning pgs inputs for differential and single-ended signals overall gain of -3 to 57 db, adjustable in steps of 0.08 db output referred offset range of 1.2 v, adjustable in steps of 2 mv signal bandwidth to 1 mhz and in/out latency below 1 s selectable automatic gain and offset control for encoder applications on-chip or off-chip temperature sensing temperature drift compensation for gain and offset via programmable look-up-tables short-circuit-proof outputs: 1 vpp to 100 ? , 2 vpp to 1 k ? i 2 c interface to restore device setup from serial eeprom bidirectional 1-wire interface for direct ram and eeprom access optical setup link via 1-wire interface operating a photo receiver single 3.0 v to 5.5 v supply operating temperature range of -40 to +125 c applications programmable general purpose sensor interface optical position sensors magnetic position sensors incremental position sensors linear scales packages qfn32 5 mm x 5 mm rohs compliant block diagram copyright ? 2007, 2017 ic-haus http://www.ichaus.com
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 2/ 26 description the general purpose sensor signal conditioner ic-tw3 provides highly accurate non contact trim- ming of three independent sine/cosine sensor signals. the differential output signals can be calibrated to 1 vpp or to 2 vpp, alternatively. the internal or an external temperature sensor linked to the chip can infuence the gain and offset correction by arbitrary temperature-dependent compensation pa- rameters sourced from a look-up table. for encoder applications an automatic gain and off- set control compensates sensor offset voltages and stabilizes the output signal level. the direct connection of sine/cosine encoders, mr sensor bridges or photosensor arrays is possible and supported by a selectable input impedance.
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 3/ 26 packaging information pin configuration qfn32 (5 mm x 5 mm) (top view) pin functions no. name function 1 pinz signal input z+ 2 ninz signal input z- 3 testen test mode enable input 4 clk external clock input (optional) 5 nzo signal output z- 6 zo signal output z+ 7 gndb driver ground 8 vddb +3...+5.5 v driver supply voltage 9 nbo signal output b- 10 bo signal output b+ 11 gnd digital ground 12 scl i2c interface, clock line 13 sda i2c interface, data line 14 vdd +3...+5.5 v digital supply voltage 15 gnda driver ground 16 n.c. 1 17 ao signal output a+ 18 nao signal output a- 19 vdda +3...+5.5 v driver supply voltage 20 1w 1-wire interface, bidirectional port 21 nerr error message output (active low) 22 nrst external reset input (active low) 23 nstore 2 coeffcient store input (active low) 24 n.c. 1 25 nina signal input a- 26 pina signal input a+ 27 kelvin external temperature sensor input 28 gndin input ground 29 vddin +3...+5.5 v input supply voltage 30 pinb signal input b+ 31 ninb signal input b- 32 vc 1.21 v reference voltage output, reference voltage input (optional) tp tp 3 thermal pad ic top marking: = product code, = assembly code (subject to changes), = date code (subject to changes); 1 pin is not connected. 2 pin nstore should be wired to vdd. 3 the thermal pad of the qfn package (bottom side) is to be connected to a ground plane on the pcb which must have gnd potential. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 4/ 26 package dimensions 5 5 top 3.10 3.10 0.40 0.50 0.25 bottom 0.90 0.10 side 3.10 3.10 4.90 4.90 0.30 0.50 0.70 r0.15 recommended pcb-footprint dra_qfn32-5x5-3_pack_1, 10:1 all dimensions given in mm. tolerances of form and position according to jedec mo-220.
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 5/ 26 absolute maximum ratings these ratings do not imply operating conditions; functional operation is not guaranteed. beyond these ratings device damage may occur. item symbol parameter conditions unit no. min. max. g001 vddx() voltage at vdd, vdda, vddb, vddin referenced to gnd, gnda, gndb, gndin -0.3 6.0 v g002 v() voltage applied to any other pin referenced to gnd -0.3 vdd + 0.5 v g003 v() voltage difference vdda, vddb vs. vdd 0.5 v g004 v() voltage difference vddin vs. vdd 0.5 v g005 v() voltage difference gnda, gndb vs. gnd 0.5 v g006 v() voltage difference gndin vs. gnd 0.5 v g007 vd esd susceptibility of signal outputs: ao, nao, bo, nbo, zo, nzo hbm, 100 pf discharged through 1.5 k ? 2 kv g008 vd esd susceptibility (remaining pins) hbm, 100 pf discharged through 1.5 k ? 2 kv g009 tj junction temperature -40 150 c g010 ts storage temperature -40 150 c thermal data item symbol parameter conditions unit no. min. typ. max. t01 ta operating ambient temperature range -40 125 c t02 rthja thermal resistance chip to ambient surface mounted to pcb according to jedec 51 40 k/w all voltages are referenced to ground unless otherwise stated. all currents fowing into the device pins are positive; all currents fowing out of the device pins are negative.
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 6/ 26 electrical characteristics operating conditions: vdd, vdda, vddb, vddin = 3.0...5.5 v, tj = -40...125 c, reference point gnd unless otherwise stated item symbol parameter conditions unit no. min. typ. max. total device 001 vddx permissible supply voltage at vdd, vdda, vddb, vddin 3.0 5.5 v 002 i(vddx) total supply current vddx = 3.3 v 15 ma vddx = 5.5 v 25 ma 003 vc()hi clamp-voltage hi at all pins vc()hi = v() - vdd; i() = 10 ma 0.3 1.4 v 004 vc()lo clamp-voltage lo at all pins i() = -10 ma -1.2 -0.3 v analog signal inputs pina, nina, pinb, ninb, pinz, ninz 101 vin()sig permissible input voltage range 1.4 vdd - 1.2 v v 102 vin()os input offset voltage 5 15 mv 103 iin() input current ensigab = 0, ensigz = 0 -35 35 na 104 rpu() input pull-up resistor ensigab = 1, ensigz = 1 2.0 2.5 3 m ? 105 fg -3 db bandwidth pga gain of 36 db 1.2 mhz 106 cmrr common mode rejection ratio fc < 1 mhz 40 db fc < 1 khz 60 db 107 psrr power supply rejection ratio fc < 1 mhz 40 db fc < 1 khz 60 db 108 e n input voltage noise f = 1 khz 20 n v/ hz f = 100 hz 25 n v/ hz f = 0.1 to 10 hz 2 v/ hz 109 ? dgain dynamic gain step width 0.08 db 110 ? doffs dynamic offset step width 2 mv temperature sensor and analog input kelvin 201 tor int. temperature sensor operat- ing range after calibration of adc; -50 150 c 202 tacc device-to-device temp. sensor variation after calibration of adc, 10 c tj = -40 c to 125 c 203 vin()low temperature input voltage celsius(7:0) = 10 1.7 v celsius(7:0) = 245 0.9 v 204 iin() input current at kelvin v(kelvin) = 0 .. vdd -50 50 na 205 t()lo lo-temperature adc reading, via register celsius(7:0) after calibration of adc; xcelsius = 0, internal sensor: tj = -40 c 19 xcelsius = 1, ext. sensor: v(kelvin) = 1.7 v 10 206 t()hi hi-temperature adc reading, via register celsius(7:0) after calibration of adc; xcelsius = 0, internal sensor: tj = 125 c 224 xcelsius = 1, ext. sensor: v(kelvin) = 0.9 v 245 reference voltage input/output vc 301 vout(vc) reference voltage output vext = 0; cl = 100 nf, i() = 0 ma 1.10 1.21 1.35 v 302 vin(vc) permissible input voltage range at vc vext = 1 0 2.21 v 303 iin(vc) input current at vc vext = 1 -0.1 1 a power-on reset and input nrst 401 vddon turn-on threshold (power-on release) increasing voltage at vdd 3.0 v 402 vddoff turn-off threshold (power-down reset) decreasing voltage at vdd 2.6 v 403 vt()hi input threshold voltage hi vdd = 3.3 v +/- 10 % 1.5 v vdd = 5.0 v +/- 10 % 3.3 v 404 vt()lo input threshold voltage lo vdd = 3.3 v +/- 10 % 0.8 v vdd = 5.0 v +/- 10 % 1.0 v 405 ipu() input pull-up current v() = 0...vdd - 1 v -3 a 406 vpu() input pull-up voltage vpu() = vdd - v(), i() = -3 a 700 mv
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 7/ 26 electrical characteristics operating conditions: vdd, vdda, vddb, vddin = 3.0...5.5 v, tj = -40...125 c, reference point gnd unless otherwise stated item symbol parameter conditions unit no. min. typ. max. oscillator clk, testen 501 vt()hi input threshold voltage hi vdd = 3.3 v +/- 10 % 1.5 v vdd = 5.0 v +/- 10 % 3.3 v 502 vt()lo input threshold voltage lo vdd = 3.3 v +/- 10 % 0.8 v vdd = 5.0 v +/- 10 % 1.0 v 503 ipd() input pull-down current v() = 1 v...vdd 3 a 504 vpd() input pull-down voltage i() = 3 a 700 mv 505 fosc oscillator frequency test_clk = 1, measured at nerr; clkdiv = 0 (low active) 2 mhz clkdiv = 1 4 mhz 506 fn() permissible external clock fre- quency at clk 4 mhz 1-wire interface 1w 601 vs()lo saturation voltage lo i() = 1 ma 300 mv 602 isc()lo short-circuit current lo 2 ma 603 ipu() input pull-up current v() = 0...vdd - 1 v -3 a 604 vpu() input pull-up voltage vpu() = vdd - v(), i() = -3 a 700 mv 605 tr(), tf() rise and fall time (10/90%) vdd = 3.3 v, cl = 10 pf 32 ns 606 vt()hi input threshold voltage hi vdd = 3.3 v +/- 10 % 1.5 v vdd = 5.0 v +/- 10 % 3.3 v 607 vt()lo input threshold voltage lo vdd = 3.3 v +/- 10 % 0.8 v vdd = 5.0 v +/- 10 % 1.0 v i2c interface sda, scl 701 vs()lo saturation voltage lo i() = 1 ma 400 mv 702 isc()lo short-circuit current lo v() = 1v...vdd 3 ma 703 ipu() pull-up current v() = 0...vdd - 1 v -3 a 704 vpu() input pull-up voltage vpu() = vdd - v(), i() = -3 a 700 mv 705 vt()hi input threshold voltage hi at sda vdd = 3.3 v +/- 10 % 1.5 v vdd = 5.0 v +/- 10 % 3.3 v 706 vt()lo input threshold voltage lo at sda vdd = 3.3 v +/- 10 % 0.8 v vdd = 5.0 v +/- 10 % 1.0 v 707 fclk() write/read clock frequency at scl clkdiv = 0 100 khz 708 tbusy()cfg duration of startup confguration clkdiv = 0, 2 lut blocks 20 ms clkdiv = 0, 16 lut blocks 80 ms digital output nerr 901 vs()lo saturation voltage lo i() = 1 ma 400 mv 902 vs()hi saturation voltage hi vs()hi = vdd - v(); i() = -1 ma 400 mv 903 isc()lo short-circuit current lo 3 ma 904 isc()hi short-circuit current hi -2.5 ma
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 8/ 26 electrical characteristics operating conditions: vdd, vdda, vddb, vddin = 3.0...5.5 v, tj = -40...125 c, reference point gnd unless otherwise stated item symbol parameter conditions unit no. min. typ. max. line driver outputs ao, nao, bo, nbo, zo, nzo b01 vpk()max permissible output amplitude vdd = 3 v, rl = 50 ? vs. vdd/2 550 mv b02 vdc() output dc voltage vdd / 2 b03 ? vout() output voltage load depen- dency i() = 0...5 ma 50 mv b04 isc()lo short-circuit current lo pin shorten to vdd/2 12 50 ma b05 isc()hi short-circuit current hi pin shorten to vdd/2 -50 -12 ma b06 isc() output current limitation hi/lo v() = 0...vdd 40 50 ma b07 sr()hi, lo slew rate hi/lo cl() = 5 nf 3 v / s cl() = 50 pf 4 v / s b08 t s settling time cl() = 5 nf, to 0.1% of fnal value 1 s b09 dbvlin output linearity 100 khz sine and diff. 1 vpp output voltage; rl() > 1 k ? 80 db rl() = 120 ? 60 db b10 clmax maximum capacitive output load no sustained oscillation 100 nf
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 9/ 26 programming register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page 10 i2c interface . . . . . . . . . . . . . . . . . . . . . . . . . . . page 12 checksum: eeprom checksum 1-wire interface . . . . . . . . . . . . . . . . . . . . . . . . . . . page 13 a/b signal path . . . . . . . . . . . . . . . . . . . . . . . . . . . page 15 singlein: single ended input functionality ensigab: input signal error detection control cgaina/b: coarse gain select for channel a/b cofsa/b: coarse offset select for channel a/b dgaina/b: dynamic gain on channel a/b dofsa/b: dynamic offset on channel a/b ogain: output amplifer gain select on channel a/b filter: signal path flter select pda/b: power down control for channel a/b z signal path (index) . . . . . . . . . . . . . . . . . . . . . . page 17 singlez: single ended input functionality for in- dex channel z modez: channel z output mode select bypassz: channel z comparator bypass control gainz: gain select for channel z ofsz: offset select for channel z ogainz: output amplifer gain select on channel z ensigz: input signal error detection control on channel z pdz: power down control for channel z polarityz: channel z polarity select automatic compensation . . . . . . . . . . . . . . . . . page 19 vext: target voltage select dynamic: automatic compensation control freq: automatic adaption frequency gentle: automatic compensation update rate temperature sensing . . . . . . . . . . . . . . . . . . . . . page 20 xcelsius: temperature sensor select fcelsius: fine temperature offset value ccelsius: coarse temperature offset value celsius: current temperature value error conditions . . . . . . . . . . . . . . . . . . . . . . . . . . page 21 err_sig: signal unconnected alarm err_temp: temperature alarm err_ee: eeprom error condition temperature compensation . . . . . . . . . . . . . . page 22 temp: temperature compensation control test modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page 23 pd_celsius: power down control for internal tem- perature sensor test_clk: internal test clock oscillator control clkdiv: internal clock divider select typical applications . . . . . . . . . . . . . . . . . . . . . . page 24
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 10/ 26 register map addr bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 confguration registers 0x00 rom device id[7:0] 0x01 ogain[1:0] singlein freq[1:0] gentle dynamic temp 0x02 vext xcelsius ogainz[1:0] modez bypassz singleinz polarityz 0x03 err_sig err_temp err_ee talarm[2:0] ensigz ensigab 0x04 en_nstore* filter[1:0] pdz pdb pda 0x05 ccelsius[3:0] fcelsius[3:0] 0x06 gainz[2] ofsz[5:0] 0x07 gainz[1:0] cgainb[2:0] cgaina[2:0] 0x08 cofsa[7:0] 0x09 cofsb[7:0] 0x0a dgaina[7:0] 0x0b dgainb[7:0] 0x0c dofsa[7:0] 0x0d dofsb[7:0] 0x0e vc[1:0]* clkslow* clkdiv test_clk pd_celsius 0x0f internal checksum(7:0) 0x10 test_adc* test_vga* test_pga* vtest1* vtest0* pd_bg* test_bg* 0x11 0x12 celsius[7:0] 0x13 internal state machine registers 0x14 internal use 0x15 internal use 0x16 internal use 0x17 internal use 0x18 internal use 0x19 internal use 0x1a internal use 0x1b internal use 0x1c internal use 0x1d internal use 0x1e internal use 0x1f internal use 0x20 internal use 0x21 internal use 0x22 internal use 0x23 internal use 0x24 internal use 0x25 internal use 0x26 internal use 0x27 internal use peripheral registers 0x40 celsiusraw[7:0] 0x41 channel ofs_p ofs_n gain_p gain_n 0x42 ee_err xerr_out 1output 1input xstore sig_valid
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 11/ 26 register map addr bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0x43 ee_irq 1input_irq xs- tore_irq notes only the confguration registers are user programmable. *) bits marked by an asterisk are solely intended for ic test and must be kept on zero for normal operation. table 4: register layout
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 12/ 26 i2c interface startup an external i 2 c 1-kbit eeprom (e.g. 24xx01 family) is used to store confguration parameters permanently. on power-up and after reset is released ic-tw3 ac- cesses the external eeprom and reads its device confguration according to table 6 . eeprom checksum the checksum at address 0x0f contains the 8-bit sum of registers 0x01 to 0x0e plus the 8-bit sum of all lut bytes up to and including the fnal block with its break- point set to 255. on startup ic-tw3 calculates the expected checksum and compares it with the value stored at eeprom address 0x0f. if computed and stored address match normal operation begins. otherwise, ic-tw3 asserts an error condition and pin nerr is pulled low. it is the users responsibility to store the correct check- sum in the eeprom during production programming. checksum(7:0) addr. 0x0f; bit 7:0 r/w code function ... checksum of eeprom contents: over 0x01 to 0x0e and 0x10 to 0x1b (minimum) over 0x01 to 0x0e and 0x10 to 0x6f (maximum) table 5: checksum eeprom register map the 14 bytes of device confguration data are followed by a minimum of 2 to a maximum of 16 lock-up-table blocks (lut). the lut block size is 6 bytes each and the fnal block is indicated by its breakpoint value of 255. thus, a minimum of 28 bytes are read with 2 active lut blocks and 112 bytes are read with 16 active lut blocks during the confguration phase. the last lut block ist indicated by a breakpoint value of 255. further descriptions on luts are given in section "temperature compensation" on page 22 . note that the checksum is only calculated up and including the last lut block. note that the eeprom address space maps to the 1-wire address 128. accessing eeprom address 0 is therefore equivalent to accessing memory location 128 via the 1-wire interface (see page 13 ). eeprom address description corresponding confguration register 0x00 - 0x01 confg. 1 0x01 0x02 confg. 2 0x02 0x03 confg. 3 0x03 0x04 confg. 4 0x04 0x05 temp. sensing 0x05 0x06 confg. index 0x06 0x07 coarse gain 0x07 0x08 cofsa 0x08 0x09 cofsb 0x09 0x0a dgaina 0x0a 0x0b dgainb 0x0b 0x0c dofsa 0x0c 0x0d dofsb 0x0d 0x0e test 1 0x0e 0x0f checksum 0x0f eeprom address description lut block number 0x10 breakpoint 0 0 0x11 gaina 0 0x12 gainb 0 0x13 ofsa 0 0x14 ofsb 0 0x15 ofsz 0 0x16 breakpoint 1 (255) 1 0x17 gaina 1 0x18 gainb 1 0x19 ofsa 1 0x1a ofsb 1 0x1b ofsz 1 . . . . . . . . . 0x6a breakpoint 255 15 0x6b gaina 15 0x6c gainb 15 0x6d ofsa 15 0x6e ofsb 15 0x6f ofsz 15 table 6: eeprom register map
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 13/ 26 1-wire interface the 1-wire interface provides read and write access to the register bank and to the external eeprom. when read access is not required an infrared phototransistor can be directly connected to the pin in order to build a cost effective wireless write-only port for in-feld or production programming. the communication bit stream is pulse-width modulated (pwm) as shown in figure 1 . a zero-bit is encoded as a short high followed by a long low. a one-bit is encoded as a long high followed by a short low. the modulated signal is independent of the receiver or the transmitted clock frequency. since ic-tw3 uses a free-running oscillator it is important to implement a robust, frequency insensitive protocol. figure 1: pulse width modulation bit stream parameter description min max t start low time start condition (master only) 1 ms t long unit time long (master and ic-tw3) t short + 10 s 400 s t short unit time short (master and ic-tw3) 35 s t long - 10 s t delay delay on register read (ic-tw3 only) 35 s t idle interface idle before next access access was write to external eeprom access was not write to external eeprom 8 ms 3 ms table 7: 1-wire interface timing t s h o r t t s h o r t t s h o r t t l o n g t l o n g t l o n g t d e l a y t i d l e i d l e s t a r t d e l a y i d l e 1 0 1 - w i r e t i m i n g
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 14/ 26 addressing the eeprom address 0x00 maps to the 1-wire ad- dress 128. accessing eeprom address 0 is therefore equivalent to accessing memory location 128 through the 1-wire interface. all other 1-wire addresses are thus determined by adding 128 to the eeprom address of interest. write sequence figure 2 describes the write sequence of the 1-wire interface. on an idle wire, a write sequence is initiated by generating a start condition followed by the write command (000) and by the address and register data. read sequence a read sequence is depicted in figure 3 . after the start condition the read command (001) is followed by the register address. the master then releases the wire and ic-tw3 begins to pull low while internally access- ing the data. when the data is ready it is produced while following the same pwm rules valid for the master. figure 2: register write sequence figure 3: register read sequence 000 address(7:0) start data(7:0) 0 idle 1-wire write access idle wire not driven wire driven by master idle, wire is high to initiate communication pull low for at least t start 3-bit command word 000 = write 001 = read 8-bit register address: 0 to 127: internal registers 128 to 255: external eeprom filler bit, value 0 wait at least for t idle before new access 001 address(7:0) start 1-wire read access idle wire not driven wire driven by master idle, wire is high to initiate communication pull low for at least t start 3 bit command word 000 = write 001 = read 8-bit register address: 0 to 127: internal registers 128 to 255: external eeprom master releases driver wait at least for t idle before new access x data(7:0) idle delay ic-tw3 starts returning data (first bit is dummy) ic-tw3 drives low until data is ready wire driven by ic-tw3
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 15/ 26 a/b signal path ic-tw3 incorporates two analog gain paths called chan- nel a and b, respectively. gain and offset of both paths are independently controlled and temperature compen- sated. figure 4 depicts a diagram of a single signal path, table 8 below summarizes gain and offset char- acteristics. figure 4: the a/b signal path input amplifer dynamic amplifer output amplifer composite gain range 0..36 db -2..18.4 db -3 db, 0 db, 6 db -5..60 db gain step 6.0 db 0.08 db offset range input referred 1.24 v gain input 0.25 v gain input 1.49 v gain input offset step input referred 40 mv gain input 2 mv gain input gain input = 10 gain _ of _ input _ amplifer _ in _ db 20 table 8: overview of gain and offset characteristics single ended signals single ended input functionality is provided by connect- ing the negative input terminal (pins nina and ninb) to an internally generated voltage of v dd /2. this is enabled by setting the control bit singlein to 1. alter- natively, an externally generated reference voltage may be applied to the negative input terminals. singlein addr. 0x01; bit 5 r/w code function 0 a and b inputs are differential (default) 1 a and b inputs are single ended table 9: single ended input functionality input error detection weak input pull-up resistors are enabled by setting con- trol bit ensigab to 1. the resistors are at minimum 2.0 m ? . when driving the input with a high impedance source it might be necessary to disable the pull-up re- sistors to avoid excessive signal distortion. the pull-up resistors are used to sense foating or damaged sen- sor connections. any input terminal left unconnected is pulled to v dd and triggers a sensor error condition err_sig . ensigab addr. 0x03; bit 0 r/w code function 0 pull-up resistors disconnected and error reporting disabled (default) 1 pull-up resistors and error reporting active on a/b inputs table 10: input signal error detection control gain and offset registers cgaina(2:0) and cgainb(2:0) are used to set the coarse gain. coarse gain is static and it is not changed by the temperature or automatic compensa- tion algorithm. the highest legal value for cgaina(2:0) and cgainb(2:0) is 6. equivalently registers cofsa(5:0) and cofsb(5:0) are used to control the static off- set of the input signal. note that cofsa(5:0) and + f o f s a / b ( 7 : 0 ) c g a i n a / b ( 2 : 0 ) o g a i n ( 1 : 0 ) + v d d n i n a / n i n b v d d / 2 n a o / n b o + a o / b o - e n s i g a b f g a i n a / b ( 7 : 0 ) o u t p u t f i l t e r ( 1 : 0 ) i n p u t c o f s a / b ( 5 : 0 ) d y n a m i c p i n a / p i n b s i n g l e i n
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 16/ 26 cofsb(5:0) are in 2s complement format and their value range is limited from -31 to +31. cgaina(2:0) addr. 0x07; bit 2:0 r/w cgainb(2:0) addr. 0x07; bit 5:3 r/w code gain = cgain x 6 db 0x00 0 db (default) 0x01 6 db ... 0x06 36 db table 11: coarse gain select for channel a/b cofsa(7:0) addr. 0x08; bit 7:0 r/w cofsb(7:0) addr. 0x09; bit 7:0 r/w code 2k code 5:0, and decimal offset = cofs x 40 mv 0xe1 0x21, -31 -1240 mv ... ... 0xff 0x3f, -1 -40 mv 0x00 0x00, 0 0 mv (default) 0x01 0x01, +1 40 mv ... ... 0x1f 0x1f, +31 1240 mv table 12: coarse offset select for channel a/b dgaina(7:0) addr. 0x0a; bit 7:0 r/w dgainb(7:0) addr. 0x0b; bit 7:0 r/w code gain = dgain x 0.08 db - 2 db 0x00 -2 db (default) ... 0x19 0 db 0x1a 0.08 db ... 0xff 18.4 db table 13: dynamic gain select for channel a/b dofsa(7:0) addr. 0x0c; bit 7:0 r/w dofsb(7:0) addr. 0x0d; bit 7:0 r/w code offset = cofs x 2 mv 0x81 -254 mv ... 0xff -2 mv 0x00 0 mv (default) 0x01 2 mv ... 0x7f 254 mv table 14: dynamic offset select for channel a/b value fgaina/b and fofsa/b are fne gain and off- set control respectively. they are calculated dynam- ically according to the temperature compensation al- gorithm. in case temperature compensation is not enabled the values of fgaina/b and fofsa/b are equal to the register values in dgaina/b(7:0) and dofsa/b(7:0) . refer to chapter "temperature com- pensation" on page 22 for a detailed explanation of fne gain and fne offset calculations. dgaina/b(7:0) and dofsa/b(7:0) can be programmed to a fxed value or it is automatically updated when dynamic adaption is enabled. output driver the output amplifer is capable of driving a 100 ? differ- ential load and is stable with capacitive loads of up to 100 nf. control register ogain(1:0) is used to select the output amplifer gain. a gain of -3 db is useful to accommodate input signals larger than 1 v and gain of +6 db will provide a 1 vpp single-ended output. note that the selected output amplifer gain will infuence the automatic gain compensation. refer to section "auto- matic compensation" on page 19 for details. ogain(1:0) addr. 0x01; bit 7:6 r/w code function 0x00 0 db (default) 0x01 reserved 0x02 +6 db 0x03 -3 db table 15: output amplifer gain on channel a/b a programmable 1 st -order low-pass flter can be en- abled to limit the path bandwidth. the flter cut-off frequency can be set via the filter(1:0) register. filter(1:0) addr. 0x04; bit 4:3 r/w code function 0x00 1 mhz (default) 0x01 500 khz 0x02 200 khz 0x03 reserved table 16: signal path flter in order to save power the complete signal path can be disabled using the control bits pda and pdb respec- tively. when disabled the outputs are high impedance. the dynamic adaption should be disabled when either channel a or b is disabled. pda addr. 0x04; bit 0 r/w pdb addr. 0x04; bit 1 r/w code function 0 channel a/b is enabled (default) 1 channel a/b is powered down table 17: power down control on channel a/b
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 17/ 26 z signal path (index) a third analog path is used for index signal processing frequently found in encoder applications. refer to fig- ure 5 for an overview. an input amplifer with a gain range of 0 to 36 db is used to amplify the index signal to an intermediate level. the input amplifer employs output referred offset correction. this is used to elimi- nate inherent amplifer offset as well as sensor offset. additionally, the same offset correction is used to skew the comparator shift point to a desired level. the offset correction is temperature compensated with a lut. figure 5: the z signal path input amplifer output amplifer composite gain range 0..36 db -3 db, 0 db, 6 db -3..42 db gain step 6 db offset range input referred 1.86 v gain input 1.86 v gain input offset step input referred 60 mv gain input gain input = 10 gain _ of _ input _ amplifer _ in _ db 20 table 18: gain and offset characteristics for channel z a single ended input referenced to v dd /2 is provided by setting bit singleinz of register 0x02. alternatively, pin ninz can be biased with an external voltage. singleinz addr. 0x02; bit 1 r/w code function 0 channel z input is differential (default) 1 channel z is single ended table 19: single ended input functionality a zero-crossing comparator generates a 1.0 v peak-peak output signal or a rail-to-rail signal depending on control bit modez . the comparator can be bypassed which allows using the z path as a regular amplifer path. by- passing can be toggled via bit bypassz of register 0x02. modez addr. 0x02; bit 3 r/w code function 0 1 vpp out (default) 1 rail-to-rail output (requires ogainz(1:0) set to 0x2) table 20: channel z output mode select bypassz addr. 0x02; bit 2 r/w code function 0 comparator is enabled (default) 1 comparator is bypassed table 21: channel z comparator bypass - 1 v p p v d d e n s i g z b y p a s s z o u t p u t n z o z o o g a i n z ( 1 : 0 ) v d d / 2 s i n g l e i n z g a i n z ( 2 : 0 ) m o d e z p i n z n i n z + p o l a r i t y z o f s z ( 5 : 0 ) + + - + -
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 18/ 26 gain and offset gain and offset selections on channel z are made available by providing control bits gainz(2:0) and ofsz(5:0) . note that the maximum value for gain on channel z is 6 which corresponds to a total gain of 36 db. gainz(2:0) is split up amongst register 0x06 which holds the msb and register 0x07 holding the other two bits. ofsz(5:0) is the correction value to the output of the input amplifer and is interpreted as 2s complement. the input referred offset is therefore gain dependent. the output gain on channel z can be set via control bits ogainz(1:0) . for more details again refer to section "a/b path" on page 15 . gainz(2:0) addr. 0x06; bit 7 r/w addr. 0x07; bit 1:0 code gain = gainz x 6 db 0x00 0 db (default) 0x01 6 db ... 0x06 36 db table 22: gain select for channel z ofsz(5:0) addr. 0x06; bit 5:0 r/w code 2k decimal offset = cofs x 60 mv 0x21 -31 -1860 mv ... ... 0x3f -1 -60 mv 0x00 0 0 mv (default) 0x01 +1 60 mv ... ... 0x1f +31 1860 mv table 23: offset select for channel z ogainz(1:0) addr. 0x02; bit 5:4 r/w code function 0x00 0 db (default) 0x01 reserved 0x02 +6 db 0x03 -3 db table 24: output amplifer gain on channel z input error detection pull-up resistor and error detection on channel z can be controlled by bit ensigz of register 0x03, disabling of the complete z path can be achieved by setting bit pdz of register 0x04 to 1. for more detailed information on pull-up and power control refer to section "a/b path" on page 15 as the behaviour of index path and signal path equal regarding these matters. ensigz addr. 0x03; bit 1 r/w code function 0 pull-up resistors disconnected and error reporting disabled (default) 1 pull-up resistors and error reporting active on inz table 25: input signal error detection control pdz addr. 0x04; bit 2 r/w code function 0 channel z is enabled (default) 1 channel z is powered down table 26: power-down control on channel z polarity of channel z furthermore, the polarity on channel z can be inverted by setting or not setting bit polarityz . polarityz addr. 0x02; bit 0 r/w code function 0 channel z has normal polarity (default) 1 channel z has inverted polarity table 27: channel z polarity select
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 19/ 26 automatic compensation automatic gain and offset correction is available for dual sensor bridges that are 90 out of phase. these types of sensors are used for encoder applications. automatic compensation removes any sensor offset and sets the gain to achieve a fxed output voltage. the target output voltage depends on the output gain ogain(1:0) as well as on the control bit vext . when using an external reference voltage, the appropriate voltage must be applied to pin vc. vext addr. 0x02; bit 7 r/w code function 0 internally generated 1 v or 2 v is used as output target voltage, depending on register ogain(1:0) . 1 voltage applied to pin vc defnes target output voltage (see table 29 ). table 28: target voltage selection ogain(1:0) output gain vext target output voltage v ppdiff 00 0 db 0 1 v 01 reserved 0 10 6 db 0 2 v 11 -3 db 0 1 v 00 0 db 1 2.21 v - v(vc) 01 reserved 1 10 6 db 1 (2.21 v - vc) x 2 11 -3 db 1 2.21 v - vc table 29: target output voltages automatic compensation is enabled by setting control bit dynamic of register 0x01 to 1. if enabled, it will constantly alter register dofsa/b and dgaina/b to maintain zero offset and the target output amplitude. control bits freq(1:0) of register 0x01 are used to limit the tracking rate. if the input frequency increases above the limit tracking will stop. normally, it is not required to limit the tracking frequency although it can be useful for certain bandwidth limited sensors. dynamic addr. 0x01; bit 1 r/w code function 0 automatic function is disabled 1 automatic function is enabled table 30: automatic compensation enable note that setting freq(1:0) to other values than 0 does not affect the signal bandwidth of the amplifer. it merely limits the rate of automatic adaption. freq(1:0) addr. 0x01; bit 4:3 r/w code function 00 no tracking limit (default) 01 200 khz 10 20 khz 11 2 khz table 31: automatic compensation adaption rate in normal operation the compensation algorithm will adjust both gain and offset simultaneously in order to achieve fast convergence. if control bit gentle of register 0x01 is set, gain and offset registers are up- dated alternately. this reduces output jumpiness at the expense of slower convergence. gentle addr. 0x01; bit 2 r/w code function 0 gain and offset are updated simultaneously 1 gain and offset are updated alternately table 32: automatic compensation sequence control automatic compensation can be used in conjunction with temperature compensation. automatic compensa- tion will then remove any residual offset or gain mis- match not corrected by the temperature correction al- gorithm. limitation the automatic compensation measures the amplitude and offset at the output of ic-tw3. in order to provide meaningful information the output signals must be of reasonable encoder quality at all times. they need to be 90 out of phase and most importantly the ampli- tude must be larger than 0.5 v peak-peak differential (larger than 0.25 v peak-peak single ended) whereas the offset must be less then +/- 0.25 v. in situations where the minimum amplitude is not guaranteed, e.g by removing the mr input sensor from the magnetic source, wrong offset and gain control correction data might be generated.
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 20/ 26 temperature sensing ic-tw3 contains an on-chip temperature sensor. op- tionally, an external sensor can be used by setting bit xcelsius of register 0x02 to 1. an external tempera- ture sensor is useful for remote temperature sensing or in situations where the internal sensor does not provide adequate accuracy. also, device self-heating due to heavy output loads can have an impact on the internal sensor readings. connect the external temperature sensor with its analog output to pin kelvin. xcelsius addr. 0x02; bit 6 r/w code function 0 select internal temperature sensor (default) 1 select external temperature sensor table 33: temperature sensor select an adc converts the analog temperature signal into an 8-bit digital word. in case the on-chip sensor is used the 8-bit value spans a temperature range of -50 c to 150 c. it is recommended to calibrate the adc using register 0x05 even when using an external temperature sensor. calibrating the temperature adc the raw adc value can be accessed through register 0x40. a 2 increment hysteresis is applied to the adc value to remove conversion noise and the offset regis- ter 0x05 is added. the fnal value is stored in register 0x12 and is used for temperature compensation. to achieve best temperature accuracy it is required to calibrate the adc by correctly programming register 0x05. at any known ambient temperature the register 0x05 is programmed such to read the expected adc value. as an example, consider the product assem- bly foor with an ambient temperature of 20 c. due to device variation the adc value read before calibration can be anything between 0 c to 40 c. register 0x05 is now used to tune the adc output value to the correct binary representation of 20 c. ccelsius(3:0) addr. 0x05; bit 7:4 r/w code bit 3 is sign, bits 2:0 are magnitude of correction 1111 most negative correction ... ... 1001 least negative correction 1000 no correction 0000 no correction (default) 0001 least positive correction ... ... 0111 most positive correction table 34: coarse offset correction fcelsius(3:0) addr. 0x05; bit 3:0 r/w code value added to adc reading is fcelsius(3:0) - 8 0000 -8 (default) 0001 -7 ... ... 1111 7 table 35: fine offset correction celsius(7:0) addr. 0x12; bit 7:0 r data function 0x00 current temperature adc value that is used for compensation calculations. value of this register is 0x40 + fcelsius(3:0) - 8 0xff table 36: temperature data temperature alarm the ic-tw3 features a built-in temperature alarm sys- tem. an alarm threshold can be specifed by the user via the talarm(2:0) bits in register 0x03. a temper- ature alarm is asserted once the temperature value generated by the adc is above the defned threshold. the alarm is indicated by the err_temp bit set to 1 as well as by pin nerr going low. talarm(2:0) addr. 0x03; bit 4:2 r/w code temp threshold = ( talarm(2:0) x 16) + 144 000 144 (default) 001 160 ... ... 110 240 111 alarm disabled table 37: temperature alarm threshold
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 21/ 26 error conditions ic-tw3 maintains three status bits reporting system error conditions. these bits are err_ee, err_temp and err_sig of register 0x03. if any error condition is triggered, i.e. indicated by any of these bits being set to 1, this will also assert pin nerr pulling it low. err_ee addr. 0x03; bit 5 r code error message 0 no error since the last reset 1 one of the following error conditions has occurred since the last reset: 1. eeprom checksum error* 2. eeprom read error 3. eeprom write error notes this error message can not be disabled and its bit status is maintained until the device is reset. *) a permanent logic zero read at sda does not lead to a checksum error. table 38: eeprom data error err_temp addr. 0x03; bit 6 r code error message 0 adc reading is below value defned in register talarm(2:0) 1 adc reading is above value defned in register talarm(2:0) notes this error is not latched. disabling temperature monitoring is possible by setting talarm(2:0) to 111. table 39: temperature alarm err_sig addr. 0x03; bit 7 r code error message 0 all input terminals are connected 1 an input terminal is left unconnected notes this error is not latched. to enable this alarm ensigab or ensigz must be set 1. table 40: signal unconnected alarm
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 22/ 26 temperature compensation temperature compensation is enabled by setting con- trol bit temp of register 0x01. a piece-wise linear interpolation of values stored in a look-up-table (lut) is employed to calculate the gain and offset for a given temperature. figure 6 shows a sample confguration with seven breakpoints. temp addr. 0x01; bit 0 r/w code function 0 temperature compensation is disabled (default) 1 temperature compensation is enabled table 41: temperature compensation enable figure 6: lut with seven breakpoints there can be a minimum of two up to a maximum of 16 temperature breakpoints within the lut. each breakpoint has fve interpolation values associated to it namely gaina, gainb, ofsa, ofsb and ofsz . for more details on the layout of the lut refer to section "eeprom" on page 12 . breakpoints can be placed freely across the temper- ature axis except for the frst and the last breakpoint. the frst breakpoint must be located at adc value 0 (which roughly corresponds to -50 c when using the internal sensor), the last breakpoint must be located at adc value 255 (150 c with the internal sensor). the lut is stored in the off-chip eeprom from memory location 0x10 onward. note that the eeprom address space maps to the 1-wire address 128. accessing eep- rom address 0 is therefore equivalent to accessing memory location 128 through the 1-wire interface. the breakpoint entry with a value of 255 marks the last valid lut entry. all addresses thereafter including their data will be ignored. temperature dependent gain and offset is determined by performing linear interpolation between breakpoints. temperature dependent gain and offset are tgaina/b and tofsa/b respectively. fine gain fgaina/b and fne offset fofsa/b (see fg- ure 4 on page 15 ) are calculated as follows: fgain = tgain + dgain fofs = tofs + dofs whereas tgain and tofs are the temperature depen- dent values calculated using the lut and dgain and dofs are registers updated either manually or by the automatic compensation function. b p 0 0 o f s z o f s b o f s a g a i n b g a i n a g a i n / o f s a d c v a l u e b p 1 b p 2 b p 3 b p 4 b p 5 b p 6 2 5 5
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 23/ 26 figure 7: temperature lut memory map test modes the ic-tw3 posses two registers 0x0e and 0x10 which provide access to basic testing functionality. the pd_celsius bit allows powering off the internal tem- perature sensor. if powered down, the temperature sensor output value can be forced to a desired value by writing to register 0x40. the user can then test the compensation circuit without cycling the device temper- ature. pd_celsius addr. 0x0e; bit 0 r/w code function 0 temperature sensor enabled (default) 1 temperature sensor disabled table 42: temperature sensor power control test_clk addr. 0x0e; bit 1 r/w code function 0 clock is not driven on any pin (default) 1 clock is driven on pin nerr table 43: internal clock oscillator clkdiv addr. 0x0e; bit 2 r/w code function 1 f system = f osc (default) 0 f system = f osc / 2 table 44: internal clock divider selection 0 gaina gainb ofsa ofsb ofsz 16 + 128 = 144 16 1-wire address eeprom address 1 gaina gainb ofsa ofsb ofsz 22 + 128 = 150 22 255 gaina gainb ofsa ofsb ofsz 28 + 128 = 156 28 3 breakpoint look-up table 0 gaina gainb ofsa ofsb ofsz 16 + 128 = 144 16 1-wire address eeprom address 1 gaina gainb ofsa ofsb ofsz 22 + 128 = 150 22 255 gaina gainb ofsa ofsb ofsz 106 + 128 = 234 106 16 breakpoint look-up table
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 24/ 26 typical applications a typical application is shown in fgure 8 . three differ- ential mr sensor bridges are connected to the ic-tw3. a, b and z outputs are driving 120 ? terminated trans- mission lines. figure 8: typical application mr sensors revision history rel. rel. date ? chapter modifcation page b2 2017-08-07 block diagram update of block diagram 1 packaging information qfn with top marking, revision of footnote, update of qfn package drawing 3 ff i2c interface table 5 : contents supplemented. text moves to grey note boxes. 12 automatic compensation limitation paragraph added. 19 ordering information p/o code of eval board 26 ? release date format: yyyy-mm-dd s e n s o r g n d p i n b 2 4 x x 0 1 i n d e x + 3 . . . 5 . 5 v s d a s c l 0 . 1 f n z o p i n a b r i d g e 0 i c - t w 3 s e n s o r + 3 . . . 5 . 5 v n a o p i n z v d d s d a n b o b o g n d i n / a / b v d d i n / a / b s c l 1 2 0 0 . 1 f v d d t e r m i n a t i o n b r i d g e 1 r r n i n a r s e n s o r 1 0 k n i n z n i n b a o z o e e p r o m
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 25/ 26 ic-haus expressly reserves the right to change its products and/or specifcations. an infoletter gives details as to any amendments and additions made to the relevant current specifcations on our internet website www.ichaus.com/infoletter and is automatically generated and shall be sent to registered users by email. copying C even as an excerpt C is only permitted with ic-haus approval in writing and precise reference to source. the data specifed is intended solely for the purpose of product description and shall represent the usual quality of the product. in case the specifcations contain obvious mistakes e.g. in writing or calculation, ic-haus reserves the right to correct the specifcation and no liability arises insofar that the specifcation was from a third party view obviously not reliable. there shall be no claims based on defects as to quality in cases of insignifcant deviations from the specifcations or in case of only minor impairment of usability. no representations or warranties, either expressed or implied, of merchantability, ftness for a particular purpose or of any other nature are made hereunder with respect to information/specifcation or the products to which information refers and no guarantee with respect to compliance to the intended use is given. in particular, this also applies to the stated possible applications or areas of applications of the product. ic-haus products are not designed for and must not be used in connection with any applications where the failure of such products would reasonably be expected to result in signifcant personal injury or death (safety-critical applications) without ic-haus specifc written consent. safety-critical applications include, without limitation, life support devices and systems. ic-haus products are not designed nor intended for use in military or aerospace applications or environments or in automotive applications unless specifcally designated for such use by ic-haus. ic-haus conveys no patent, copyright, mask work right or other trade mark right to this product. ic-haus assumes no liability for any patent and/or other trade mark rights of a third party resulting from processing or handling of the product and/or any other use of the product. software and its documentation is provided by ic-haus gmbh or contributors "as is" and is subject to the zvei general conditions for the supply of products and services with ic-haus amendments and the zvei software clause with ic-haus amendments ( www.ichaus.com/eula ).
ic-tw3 sensor signal conditioner with temperature compensation and line driver rev b2, page 26/ 26 ordering information type package order designation ic-tw3 32-pin qfn, 5 mm x 5 mm, thickness 0.9 mm, rohs compliant ic-tw3 qfn32 evaluation board ic-tw3 eval tw3d_2d please send your purchase orders to our order handling team: fax: +49 (0) 61 35 - 92 92 - 692 e-mail: dispo@ichaus.com for technical support, information about prices and terms of delivery please contact: ic-haus gmbh tel.: +49 (0) 61 35 - 92 92 - 0 am kuemmerling 18 fax: +49 (0) 61 35 - 92 92 - 192 d-55294 bodenheim web: http://www.ichaus.com germany e-mail: sales@ichaus.com appointed local distributors: http://www.ichaus.com/sales_partners

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