View 48-1013-01_8879226.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

ps026102-1207 product specification ez80f917050sbcg zdots ? sbc for ez80acclaim plus! ? connectivity assp copyright ?2007 by zilog ? , inc. all rights reserved. www.zilog.com
ps026102-1207 do not use in life support life support policy zilog's products are not authorized fo r use as critical components in life support devices or systems without th e express prior written approval of the president and general counsel of zilog corporation. as used herein life support devices or systems are devices which (a) ar e intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordan ce with instructions for use provided in the labeling can be re asonably expected to result in a significant injury to the user. a critical component is any component in a life suppor t device or system whose failure to perform can be reasonably expected to cause the fa ilure of the life support device or system or to affect its safety or effectiveness. document disclaimer ?2007 by zilog, inc. all rights reserved. information in this pu blication concerning the devices, applications, or technology describe d is intended to suggest possible uses and may be superseded. zilog, inc. does not assume liability for or provide a representation of accuracy of the information, devices, or technology described in this document. zilog also does not assume liability for intellectual property infringement related in any manner to use of information, devices, or technology described herein or otherwise. the information contained within this document has been verified according to the general pr inciples of electrical and mechanical engineering. z8, z8 encore!, z8 encore! xp , z8 encore! mc, crimzon, ez80, zneo, zdots, and ez80acclaim plus! are trademarks or registered trademarks of zilog, in c. all other product or service names are the property of their respective owners. warning:
ps026102-1207 revision history zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification iii revision history each instance in the revision history reflects a change to this document from its previous revision. for more details, refer to the corresponding pages or appropriate links given in the table below. date revision level description page no december 2007 02 updated table 6 , figure 8 , figure 9 , and figure 10 . 20 , 23 , 24 , and 25 july 2007 01 original issue. all
ps026102-1207 table of contents zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification iv table of contents zdots ? sbc for ez80acclaim plus! ? connectivity assp . . . . . . . . . . . . . . . 1 zdots ? sbc for ez80acclaim plus! tm connectivity assp features . . . . . . . . . . 1 ez80acclaim plus! tm connectivity assp features . . . . . . . . . . . . . . . . . . . . . . . 2 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 peripheral bus connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 input/output connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 onboard component description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 logic-level input/outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 onboard battery backup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 ethernet phy and rj45 connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 ethernet leds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 fast buffer (u10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 irda transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 reset generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 serial interface ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 physical dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 zdots bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 customer support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
ps026102-1207 zdots ? sbc for ez80acclaimplus! ? connectivity assp zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 1 zdots ? sbc for ez80acclaim plus! ? connectivity assp zilog?s zdots ? single board computer (sbc) for ez80acclaim plus! ? connectivity application specific standard product (assp) is a compact, high-performance ethernet sbc specially designed for the rapid develo pment and deployment of embedded systems requiring control and inte rnet/intranet connectivity. this expandable module is powered by z ilog?s latest power-efficient, high-speed, optimized pipeline architecture ez80f9 1 connectivity assp, a member of ez80acclaim plus! zilog ? family. ez80f91 is a high-speed single-cycle instru ction-fetch microcontroller, which operates with a clock speed of 50 mhz. it can also operate in z80 ? -compatible addressing mode (64 kb) or full 24-bit ad dressing mode (16 mb). the peripheral-rich zdots sbc makes it suitabl e for a variety of applications including industrial control, irda connectivity, commun ication, security, auto mation, point-of-sale terminals, and embedded networking applications. zdots ? sbc for ez80acclaim plus! tm connectivity assp features features of zdots sbc for ez80acclaim plus! connectivity assp include: ? factory-default operating cl ock frequency at 50 mhz ? 10/100 base-t ethernet phy with rj45 connector ? 512 kb fast sram ? 256 kb on-chip flash memory ? 1 mb off-chip nor flash memory ? battery-backed real-time clock ? input/output connector which provides 32 general-purpose 5 v- tolerant i/o pinouts ? zilog?s industry-leading irda transceiver?zilog zhx1810 ? onboard connector provides i/o bus for external peripheral connections (irq, cs , 24 ad- dress, and 8 data) ? low-cost connection to carrier board via two 2x30 pin headers ? small footprint 63.5 mm x 78.7 mm ? 3.3 v power supply ? standard operating temperature range: 0 oc to +70 oc
ps026102-1207 zdots ? sbc for ez80acclaimplus! ? connectivity assp zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 2 ez80acclaim plus! tm connectivity assp features features of ez80acclaim plus! connectivity assp include: ? single-cycle instruction fetch, high-performance, pipelined ez80 ? cpu core ? 256 kb of flash memory and 8 kb of sram ? 10/100 mbps ethernet mac with 8 kb frame buffer ? low power features including sleep mode, halt mode, and selective peripheral power-down control ? two uarts with independent baud rate ge nerators and support for 9-bit operation ? spi with independent clock generator ? i 2 c with independent clock generator ? infrared data asso ciation (irda)-compliant infrared encoder/decoder ? new dma-like ez80 instructions fo r efficient block data transfer ? external interface with four chip selects, individual wait state generators, and an external wait input pin?supports intel- and motorola-style buses ? flexible-priority vectored interrupts (both in ternal and external) and interrupt controller ? real-time clock with on-chip 32 khz oscillator, selectable 50/60 hz input, and separate v dd pin for battery backup ? four 16-bit counter/timers with presca lers and direct input/output drive ? watchdog timer (wdt) ? 32 bits of general-purpose input/output (gpio) ? jtag and zdi debug interfaces ? 144-pin lqfp package ? supply voltage of 3.0 v to 3.6 v with 5 v tolerant inputs ? standard operating temperature range: 0 oc to +70 oc
ps026102-1207 zdots ? sbc for ez80acclaimplus! ? connectivity assp zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 3 block diagram figure 1 displays the block diagram of zdots sbc for ez80acclaim plus! ? assp. figure 1. zdots sbc for ez80acclaim plus! assp functional block diagram ez80acclaim plus! connectivity assp (256 kb flash, 8 kb sram, emac) am79874 ethernet flash (1 mb, cs0) sram (512 kb, cs1) irda control and address bus gpio mii fast buffer data bus cs0 external gpio bus (jp2) external perpheral bus (jp1) 32 khz xtal battery 50 mhz xtal irda
ps026102-1207 pin description zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 4 pin description peripheral bus connector figure 2 displays the pin layout of the 60-pin peripheral bus connector (jp1) of the zdots ? . table 1 on page 5 describes the pins and their functions. all signals with an overline are active low. for example, b/w , for which word is active low, and b /w, for which byte is active low. figure 2. zdots peripheral bus connector pin configuration?jp1 note:
ps026102-1207 pin description zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 5 table 1. zdots peripheral bus connector pin identification* pin no symbol pull up/down* signal direction comments 1 reserved 2 reserved 3 reserved 4 reserved 5trstn input reset for on-chip instrumentation (oci). 6 reserved 7 f91_we pu 10 k ? input a low enables a write to on-chip flash memory. if this pin is unconnected, on-chip flash memory is write-protected. 8 reserved 9gnd v ss /ground (0 v). 10 v cc 3.3 v supply input pin. 11 a6 bidirectional 12 a0 bidirectional 13 a10 bidirectional 14 a3 bidirectional 15 gnd v ss /ground (0 v). 16 v cc 3.3 v supply input pin. 17 a8 bidirectional 18 a7 bidirectional 19 a13 bidirectional 20 a9 bidirectional 21 a15 bidirectional 22 a14 bidirectional 23 a18 bidirectional 24 a16 bidirectional 25 a19 bidirectional 26 gnd v ss /ground (0 v). 27 a2 bidirectional
ps026102-1207 pin description zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 6 28 a1 bidirectional 29 a11 bidirectional 30 a12 bidirectional 31 a4 bidirectional 32 a20 bidirectional 33 a5 bidirectional 34 a17 bidirectional 35 reserved 36 dis_flash pu 10 k ? input a low disables onboard flash memory. flash is enabled if dis_flash is not connected; cmos input 3.3 v (5 v tolerant). 37 a21 bidirectional 38 v cc 3.3 v supply input pin. 39 a22 bidirectional 40 a23 bidirectional 41 cs0 output 42 cs1 output 43 cs2 output 44 d0 pu 4 k ? bidirectional 45 d1 pu 4 k ? bidirectional 46 d2 pu 4 k ? bidirectional 47 d3 pu 4 k ? bidirectional 48 d4 pu 4 k ? bidirectional 49 d5 pu 4 k ? bidirectional 50 gnd v ss /ground (0 v). 51 d7 pu 4 k ? bidirectional 52 d6 bidirectional 53 mreq bidirectional 54 iorq bidirectional table 1. zdots peripheral bus connector pin identification* (continued) pin no symbol pull up/down* signal direction comments
ps026102-1207 pin description zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 7 input/output connector figure 3 on page 8 displays the pin layout of th e 60-pin i/o connector (jp2) of the zdots. however, the ez80 ? development platform features a 50-pin connector. the zdots is designed to interface pin 60 of its jp2 connector to pin 50 of the ez80 development plat- form?s jp2 connector so that pi ns 1?10 of the zdots overlap the edge of the ez80 develop- ment platform. table 2 on page 8 describes the pins. 55 gnd v ss /ground (0 v). 56 rd bidirectional 57 wr bidirectional 58 instrd output 59 busack output 60 busreq pu 2 k ? input *notes 1. external capacitive loads on rd , wr , iorq , mreq , d0?d7, and a0?a23 must be below 10 pf to satisfy timing requirements for the cpu. 2. all unused inputs must be pulled to either v dd or gnd, depending on their inactive levels, to reduce power consumption and to reduce noise sensitivity. 3. all inputs are cmos level 3.3 v (5 v tolerant), except where otherwise noted. table 1. zdots peripheral bus connector pin identification* (continued) pin no symbol pull up/down* signal direction comments
ps026102-1207 pin description zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 8 figure 3. zdots input/output connector pin configuration?jp2 table 2. zdots input/output connector pin identification* pin no symbol pull up/down signal direction comments 1 pa7 bidirectional 2 pa6 bidirectional 3 pa5 bidirectional 4 pa4 bidirectional 5 pa3 bidirectional 6 pa2 bidirectional 7 pa1 bidirectional 8 pa0 bidirectional
ps026102-1207 pin description zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 9 9v cc 3.3 v supply input pin. 10 gnd v ss /ground (0 v). 11 pb7 bidirectional 12 pb6 bidirectional 13 pb5 bidirectional 14 pb4 bidirectional 15 pb3 bidirectional 16 pb2 bidirectional 17 pb1 bidirectional 18 pb0 bidirectional 19 gnd v ss /ground (0 v). 20 pc7 bidirectional 21 pc6 bidirectional 22 pc5 bidirectional 23 pc4 bidirectional 24 pc3 bidirectional 25 pc2 bidirectional 26 pc1 bidirectional 27 pc0 bidirectional 28 pd7 bidirectional 29 pd6 bidirectional 30 gnd v ss /ground (0 v). 31 pd5 bidirectional 32 pd4 pd 4 k ? bidirectional 33 pd3 bidirectional 34 pd2 bidirectional 35 pd1 bidirectional 36 pd0 bidirectional 37 tdo output jtag data output pin. table 2. zdots input/output connector pin identification* (continued) pin no symbol pull up/down signal direction comments
ps026102-1207 pin description zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 10 38 tdi/zda input jtag data input pin. 39 gnd v ss /ground (0 v). 40 trigout output active high trigger event indicator. 41 tck/zcl pu 10 k ? input jtag input. high on reset enables zdi mode; low on reset enables oci debug. 42 tms pu 10 k ? input jtag test mode select input. 43 rtc_v dd rtc supply. for proper operation of the zdots, this pin must be connected to the same power source that powers the module (as it is done on the zilog ? development platform). 44 ez80clk output synchron ous cpu clock output. 45 i 2 cscl pu 4 k ? bidirectional i 2 c bus clock. 46 gnd v ss /ground (0 v). 47 i 2 csda pu 4 k ? bidirectional i 2 c data clock. 48 gnd power v ss /ground (0 v). 49 f lash we pu 10 k ? input a low enables a write to external flash memory boot block area. if this pin is unconnected, the flash memory boot block area is write-protected. 50 gnd v ss /ground (0 v). 51 cs3 output used on the ez80190, ez80l92, ez80f92, ez80f93 devices and connected to the cs8900 emac. 52 dis_irda pu 10 k ? input a low disables the onboard irda transceiver to use pc0/pc1 uart pins externally. 53 reset pu 2 k ? bidirectional reset output from module or push-button reset. 54 wait pu 2 k ? input driving the wait pin low forces the cpu to provide additional clock cycles for an external peripheral or external me mory to complete its read or write operation. 55 v cc 3.3 v supply input pin. 56 gnd v ss /ground (0 v). table 2. zdots input/output connector pin identification* (continued) pin no symbol pull up/down signal direction comments
ps026102-1207 pin description zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 11 57 halt_slp output, active low a low on this pin indicates that the cpu enters either halt or sleep mode because of execution of either a halt or slp instruction. 58 nmi pu 10 k ? schmitt-trigger input, active low the nmi input is a higher priority input than the maskable interrupts. it is always recognized at the end of an instruction, regardless of the state of the interrupt enable control bits. this input includes a schmitt-trigger to allow rc rise times. this external nmi signal is combined with an internal nmi signal generated from the wdt block before being connected to the nmi input of the cpu. 59 v cc 3.3 v supply input pin. 60 reserved nc reserved?no connection. *notes 1. external capacitive loads on rd , wr , iorq , mreq , d0?d7, and a0?a23 must be below 10 pf to satisfy timing requirements for the cpu. 2. all unused inputs must be pulled to either v dd or gnd, depending on their inactive levels, to reduce power consumption and to reduce noise sensitivity. 3. all inputs are cmos level 3.3 v (5 v tolerant), except where otherwise noted. table 2. zdots input/output connector pin identification* (continued) pin no symbol pull up/down signal direction comments
ps026102-1207 onboard component description zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 12 onboard component description logic-level input/outputs the i/o connector features 32 general-purpose 3.3 v cmos i/o pins that can be used as outputs or inputs interfacing to external logic. all i/os are 5 v tolerant. some of the gen- eral-purpose i/o pins support dual mode fu nctions (spi, timer i/o, uarts, and bit i/o with edge- or level-triggered interrupt functions on each pi n). for more information on ez80acclaim plus! ? assp dual modes, refer to ez80f91 product specification (ps0192) . onboard battery backup an onboard panasonic vl-1220-1vc 3 v lithium battery powers the 32 khz real-time clock when external power is remo ved. the battery is charged through diode cr1 and resistor r28 when external power is applied to the board. ethernet phy and rj45 connector the zdots ? contains advanced micro devices? am79c874 media-independent interface (mii) and a halo rj45 with integrated ma gnetics (transformer and common-mode chokes) and two led indicators. the mii enables different modes of ethernet communication, configurable by resistors r19, r21, r23, and r24. the zdots is sh ipped with all four resistors installed. table 3 lists the available resistor settings and is excerpted from the am79c874 data sheet pub- lished by amd. table 3. zdots mii resistor configuration r24 aneg r19 (tech[2]) r23 (tech[1]) r21 (tech[0]) speed full-duplex aneg-en capabilities aneg in in in in yes 1 yes 1 no all disabled in in in out no no no 10hd disabled in in out in no no no 100hd disabled in in out out no no no 100hd disabled in out in in yes 1 yes 1 no all disabled in out in out no no no 10fd disabled
ps026102-1207 onboard component description zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 13 ethernet leds the ethernet connection is provided by the halo rj45 connector. it consists of two green leds that are located next to each other on the zdots ? . when phy is receiving data, the left led is on. when the phy is transmitting data, the right led is on. fast buffer (u10) the zdots has a fast buffer that (see figure 1 on page 3) exists to prevent bus contention that occurs because of slow tu rn-off time of the module?s ex ternal flash and the fast bus turn-around time of the ez80f91 (generic feature of the ez80 ? family when it is used in native mode). the problem related to bus cont ention when using ez80 family of the microprocessors in native ez80 mode is explained below, see figure 4 on page 14. for more details, refer to ez80f91 product specification (ps0192) . bus contention occurs when two or more devices drive a common bus. the ez80f91?s cs0 drives the flash ce. after the access to flash, cs0 is driven high a maximum of 8.8 ns after the next rising edge of the clock (t6 in figure 4 ). the flash turn-off time (t od ) is 25 ns, which is the tim e from oe or ce going high to the flash output drivers in out out in no no no 100fd disabled in out out out no no no 100fd disabled outinininyes 2 yes 2 yes 3 none enabled out in in out yes 2 yes 2 yes 3 10hd enabled out in out in yes 2 yes 2 yes 3 100hd enabled out in out out yes 2 yes 2 yes 3 100hd, 10hd enabled out out in in yes 2 yes 2 yes 3 none enabled out out in out yes 2 yes 2 yes 3 10fd/hd enabled out out out in yes 2 yes 2 yes 3 100fd/hd enabled out out out out yes 3 yes 2 yes 3 all enabled notes 1. mii register 0 (speed and duplex bits) must be set by a mac to achieve a link. 2. when autonegotiation is enabled, these bi ts are written but will be ignored by phy. 3. the advertised abilities of mii register 4 cannot exceed the abilities of mii regist er 1. autonegotiation must always be enabled. table 3. zdots mii resistor configuration (continued) r24 aneg r19 (tech[2]) r23 (tech[1]) r21 (tech[0]) speed full-duplex aneg-en capabilities aneg
ps026102-1207 onboard component description zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 14 going into high-z mode, that is, after the end of the ez80f91 read access to flash, it takes 8.8 ns+25 ns = 33.8 ns before flash stops driving the data bu s. at this point, the ez80f91 device is already we ll into the next bus cycle. consider the next cycle to be memory write. during the memory write cycle, data (out- put) from the ez80f91 device is valid not late r than t3 = 7.5 ns, and the write pulse is asserted not later than 4.5 ns after the fallin g edge of the clock (14.5 ns from the rising edge if clock is 50 mhz). it means that during t con = (33.8 ns ? 7.5 ns) = 26.3 ns; two devices drive the common data bus?the ez80f9 1 device and flash. in turn, data that is being written during the write operation migh t be corrupted. the part used to isolate a slow flash data bus from a fast ez80f91 bus has 5.5 ns turn-off time, which reduces 25 ns part of the t con to 5.5 ns. as a result, bus conten tion still occurs, but its duration is not 26.3 ns, as described in the following equation: data being written is not corrupted because the write pulse is not yet asserted. figure 4. bus contention without the zdots fast buffer feature time of contention 8.8 ns - 7.5 ns 5.5 ns + () 6.8 ns = = clock -cs0 f91 data bus -rd data in data out -wr -cs1 flash data bus bus contention t6 tod t3 t4
ps026102-1207 onboard component description zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 15 memory the zdots contains external flash memory and the ez80f91 connectivity assp contains internal flash memory. to allow read/write access to flash memory on the zdots, there are two signals provided on connectors jp1 and jp2. a jumper jp3 on the module enables programming of on-chip flash. there is also a signal that dupli cates the function of this jumper. table 4 describes the states of the signals and the status of the jumper for different modes. the external flash memory of zdots has an acc ess time of 100 ns. at least five wait states must be added to the cycle when accessing external flash at 50 mhz clock speed. the ez80f91 devices on-chip flash is faster; its minimum access time is 60 ns, which requires only three wait states at 50 mhz. there is 512 kb of fast sram on the zdots. access time is 12 ns, which requires one wait-state access. the ez80f91?s on-chip sram is used with zero wait states. irda transceiver an onboard irda transceiver (zilog zhx1810) is connected to pd0 (tx), pd1 (rx), and pd2 (shutdown, r_sd). the irda transceiver is of the led type 870 nm class 1. the receiver supply current is 90?150 a and the transmitter supply current is 260 ma when the led is active. the irda transceiver is accessible via the irda controller attached to uart0 on the ez80f91 device. the uart0 console and the irda transceiver cannot be used simultaneously. to use the uart0 for console or to save power, the transceiver is disabled by the software or by an off-board signal when using the proper jumper selection. the transceiver is table 4. flash memory programming signals and jumpers signal/jumper function state/status dis_flash controls read/write access to zdots for ez80acclaim plus! assp external flash memory when low, access is enabled f lash we controls write operations to the boot block of zdots for ez80acclaim plus! assp external flash memory when low, write is enabled jp3 controls write access to ez80f91 mcu on-chip flash memory when in, write is enabled f91_we controls write access to ez80f91 mcu on -chip flash memory when low, write is enabled
ps026102-1207 onboard component description zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 16 disabled by setting pd2 (ir_sd) high or by pulling the dis_irda pin on the i/o connector low. the shutdown is used for po wer savings. to enable the irda transceiver, dis_irda is left floating and pd2 is set to low. reset generator the onboard reset generator chip performs reli able power-on reset. the chip generates a reset pulse with a duration of 200 ms if the power supply drops below 2.93 v. this reset pulse ensures that the board al ways starts in a defined condition. the reset pin on the i/o connector reflects the status of the reset line. it is a bidirectional pin for resetting external peripheral components or for resetting the zdots with a low-impedance output (for example, a 100 ? push button). serial interface ports the cpu contains two uarts with programmable baud rate generators. uart0 is con- nected to gpio pd[0:7] on the i/o connector. uart1 is co nnected to gpio pc[0:7] on the i/o connector. do not connect an rs-232 interface w ithout level shifters. there are no rs-232 level shifters on the zdots. physical dimensions the footprint of the zdots pcb is 63.5 mm x 78.7 cm. with an rj-45 ethernet connector, the overall height is 25 mm, see figure 5 on page 17. note:
ps026102-1207 onboard component description zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 17 figure 5. physical dimensions of the zdots sbc jp1 1 jp2 y3 p2 cr1 u6 c1 c11 c12 c18 c19 c20 c21 c22 c3 c40 c42 r10 r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 r28 r29 r3 r36 r37 r4 r6 u5 u8 u3 y2 y1 u4 u2 u1 vl1 + jp3 iso copyright zilog xtools 2002 zilog pca: 99c0879-001 ez80f91 module 2 78.7 mm 31.8 mm 56.0 mm 16.5 mm 63.5 mm
ps026102-1207 onboard component description zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 18 figure 6 displays the top layer silk-screen of the zdots. figure 6. zdots module?top layer jp1 1 jp2 1 y3 p2 cr1 u6 c1 c11 c12 c18 c19 c20 c21 c22 c3 c40 c42 r10 r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 r28 r29 r3 r36 r37 r4 r6 u5 u8 u3 y2 y1 u4 u2 u1 vl1 + jp3 iso copyright zilog xtools 2002 zilog pca: 99c0879-001 ez80f91 module 2
ps026102-1207 onboard component description zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 19 figure 7 displays the bottom layer silk-screen of the zdots. absolute maximum ratings stresses greater than those listed in table 5 causes permanent damage to the device. these ratings are stress ratings only. operation of the device at any conditio n outside those indi- cated in the operational sections of these spec ifications is not implie d. exposure to abso- lute maximum rating conditions for extended periods may affect device reliability. for improved reliability, unused inputs must be tied to one of the supply voltages (v dd or v ss ). figure 7. zdots module?bottom layer table 5. absolute maximum ratings parameter minimum maximum units standard operating temperature 0 +70 oc storage temperature ?45 +85 oc l1 r9 c10 c13 c14 c15 c16 c17 c2 c23 c24 c25 c26 c27 c28 c29 c30 c31 c32 c33 c34 c35 c36 c37 c38 c39 c4 c41 c43 c44 c45 c46 c47 c48 c49 c5 c50 c51 c52 c53 c6 c7 c8 c9 r1 r11 r12 r2 r26 r27 r30 r31 r32 r33 r34 r35 r5 r7 r8 u9 u10 made in u.s.a. zilog fab: 98c0879-001 rev a 1 djp 2002 jp2 jp1 2
ps026102-1207 onboard component description zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 20 zdots bill of materials table 6 lists the installed components of the zdots. operating humidity (rh @ 50 oc) 25% 90% operating voltage ? 3.6 v table 6. bill of materials for the zdots part number part name quantity jumper location manufacturer 98c0879-001 fab, rev. b 1 ? prime technologies 35-0180-12 ic, sram, 512kx8, 12 ns , 3 v, 36-soj 1 u8 alliance semi. as7c34096-12jc 35-0016-05 ic, 74lvc04, 3.3 v, gate, 14-soic 1 u1 texas instruments sn74lvc04ad 35-0720-10 ic, flash, 1mx8, 100 ns, 3 v, 40-tssop 1 u9 amd am29lv008bb- 90ed 35-0719-00 ic, max6328, reset, sot-23 1 u3 maxim inc. max6328ur29-t zhx1810 ic, ir transceiver, low profile 1 u2 zilog ? inc. zhx1810mv115thtr 35-0062-01 ic, 74lcx32, lv, quad or, 14-tssop 1 u4 fairchild semi. 74lcx32mtc 35-0022-01 ic, am7c874, phy xcvr, 80qfp 1 u6 amd am79c874vc ez80f91 ic, ez80f91, 50 mhz, 144vqfp 1 u5 zilog inc. ez80f91 35-0731-00 ic, 74cbtlv3861pwr, 24-tssop 1 u10 texas instruments sn74cbtlv3861pwr 48-1013-01 diode, tvs array, xcvr prot, 8-soic 1 u9 semtec lcda15c-6 17-2005-70 cap, 1000 pf, 50 v, ceramic chip, 0603 15 c13, c14, c31-43 panasonic ecj-1vc1h561j 17-2005-66 cap, 0.1 f, 16 v, ceramic chip, 0603 28 c2,10, c15- 30, c44-53 kemet inc. c0603c104k5rac 17-2005-54 cap, 0.01 f, 50 v, ceramic chip, 0603 1 c3 panasonic ecj-1vb1c103k table 5. absolute maximum ratings (continued) parameter minimum maximum units
ps026102-1207 onboard component description zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 21 17-2005-83 cap, 0.33 f, 16 v, ceramic chip, 0603 1 c1 panasonic ecj-1vf1c334z 17-2005-63 cap, 560 pf, 50 v, ceramic chip, 0603 1 c6 panasonic ecj-1vc1h563k 17-2001-03 cap, 12 pf, 50 v, ceramic chip, 0603 4 c9, c11, c12 panasonic ecj-1vc1h120j 17-2001-05 cap, 22 pf, 50 v, cer chip, 0603 2 c4, c7 panasonic ecj-1vc1h220j 17-2001-20 cap, 270 pf, 50 v, cer chip, 0603 1 c5 panasonic ecj-1vc1h271j 17-2001-01 cap, 5 pf, 50 v, cer chip, 0603 1 c8 panasonic ecj-1vc1h050c 48-0051-00 diode, 1n5817, rctfr 1 cr1 motorola 1n5817 16-9005-33 inductor, 3.3 h, 20%, 1210 smd 1 l1 panasonic elj-pa3r3mf 46-3001-03 resistor, 10 k?, 1%, 1/16 w, 0603 smt 15 r3, 8, 10, r12-18, r20, 25, 29, 30, 37 sprague 420ck472x2pd 46-3000-00 resistor, 0 ?, 1%, 1/16 w, 0603 smt 4 r19, 21, 23, 24 46-3000-71 resistor, 2.21 k?, 1%, 1/16w, 0603 smt 2r5, r6 46-3000-35 resistor, 68 ?, 1%, 1/16 w, 0603 smt 1 r3 46-3000-02 res, 2.2 ?, 1%, 1/16w, 0603 smt 1 r4 46-3000-32 res, 49.9 ?, 1%, 1/16w, 0603 smt 4 r11, 31, 32, 33 46-3000-63 res, 1 k?, 1%, 1/16w, 0603 smt 1 r22 46-3000-56 res, 499 ?,1%, 1/16w, 0603 smt 1 r26 46-3001-34 res, 200 k?, 1%, 1/16w, 0603 smt 1 r27 46-3000-47 res, 221 ?, 1%, 1/16w, 0603 smt 1 r28 46-3000-51 res, 332 ?, 1%, 1/16w, 0603 smt 2 r34, r35 46-3001-75 res, 10 m?, 1%, 1/16w, 0603 smt 1 r38 table 6. bill of materials for the zdots (continued) part number part name quantity jumper location manufacturer
ps026102-1207 onboard component description zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 22 23-0000-25 xtal, 25.0000 mhz, ser/resn, hc49s 1 y1 citizen hc49us25.000mabj 23-0000-50 xtal, 50.0000 mhz, ser/resn, hc49s 1 y2 citizen hc49us50.000mabj 23-0006-00 internal crystal, 32.768 khz, ser/resn, tf case 1 y3 fox nc-38 21-0907-01 connector, rj45, fast jack,10/100 base-t 1 p2 halo electronics hfj11-2450e-l11 21-0055-02 connector, hdr/pin, .025sq, double row 2jp1, jp2 (backside) harwin m-20-976-3622 table 6. bill of materials for the zdots (continued) part number part name quantity jumper location manufacturer
ps026102-1207 schematics zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 23 schematics figure 8 through figure 10 displays the layout of the zdots. ethe rnet circuiting devices are not loaded on the zdots. however, these devices appear in the following schem atics for reference. figure 8. zdots schematic diagram?connectors and miscellaneous 5 5 4 4 3 3 2 2 1 1 d d c c b b a a d3 pd1 -rd -busreq -busreq gnd tdo d[0..7] a8 -cs0 -dis_flash -reset a22 -wr rtc_vdd -busack a[0..23] pd3 -wr -halt_slp -mreq a19 a13 -flashwe a10 d5 -reset -wait -wait tdo gnd pd5 pb1 -nmi -ioreq a5 pd6 -mreq d7 -cs[0..3] a11 -cs2 -flashwe pb[0..7] a15 a18 a2 pb3 iicsda pc2 -instrd pc6 gnd -busack pc[0..7] tms d1 a4 tck pb5 -halt_slp pc4 iicscl tck pc0 iicscl a21 pd[0..7] gnd trigout tdi a6 pb7 -cs3 rtc_vdd iicsda clk_out ez80clk iicsda iicscl -dis_irda ir_sd pd2 disable_irda irda_sd pd0 irda_sd pd1 a17 d2 a16 a1 -busreq gnd d6 a9 -cs1 a23 -ioreq a0 a7 gnd d4 a12 -dis_flash d0 -instrd -rd a20 a14 pd7 pd2 pb4 -dis_irda pd4 tms pc5 pb6 ez80clk pd0 pc7 -nmi pb0 gnd trigout -wait pc3 pb2 pc1 gnd tdi gnd gnd gnd pa7 pa5 pa3 pa1 pa6 pa4 pa2 pa0 -trstn -f91_we -f91_wp -reset pa[0..7] a3 vcc vcc vcc vcc vcc vcc vcc -trstn -f91_we gnd -busack tdo pb[0..7] -wr -nmi -flashwe clk_out -halt_slp -mreq iicsda -busreq -rd d[0..7] -instrd gnd pd[0..7] -dis_flash -wait iicscl -reset a[0..23] -ioreq pc[0..7] -cs[0..3] rtc_vdd -f91_wp tdi trigout tck tms -trstn pa[0..7] vcc gnd vcc vcc vcc vcc vcc vcc vcc vcc vcc vcc gnd gnd vcc connector 2 connector 1 = (mma 0204) open-drain alternative: maxim max6802ur29d3 memory wr_en this schematic reflects the assembly rev b of the module. the flash memory on page 3 was changed to am29008b for rev d schematic. r5 2.2k r5 2.2k r1 4.7k r1 4.7k r4 2r7 r4 2r7 u4a 74lcx32 tssop14 u4a 74lcx32 tssop14 1 2 3 u1c 74lcx04 tssop14 u1c 74lcx04 tssop14 5 6 u1f 74lcx04 tssop14 u1f 74lcx04 tssop14 13 12 u1b 74lcx04 tssop14 u1b 74lcx04 tssop14 3 4 c2 0.1uf c2 0.1uf jp2 header 30x2/sm jp2 header 30x2/sm 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 r8 10k r8 10k r37 10k r37 10k u4b 74lcx32 tssop14 u4b 74lcx32 tssop14 4 5 6 r2 4.7k r2 4.7k r10 10k r10 10k c1 330nf c1 330nf jp3 jp3 1 2 r20 10k r20 10k r12 10k r12 10k u3 max6328ur29 sot-23-l3 u3 max6328ur29 sot-23-l3 reset 2 gnd 1 vdd 3 c3 0.01uf c3 0.01uf r3 68r r3 68r u4d 74lcx32 tssop14 u4d 74lcx32 tssop14 12 13 11 r9 4.7k r9 4.7k r6 2.2k r6 2.2k u1a 74lcx04 tssop14 u1a 74lcx04 tssop14 1 2 jp1 header 30x2/sm jp1 header 30x2/sm 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 u2 zhx1810 u2 zhx1810 txd 2 sd 4 rxd 3 leda 1 vcc 5 gnd 6 t 0 r7 10k r7 10k
ps026102-1207 schematics zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 24 figure 9. zdots schematic diagram?cpu and phy 5 5 4 4 3 3 2 2 1 1 d d c c b b a a d0 d1 d2 d3 d5 d7 d4 d6 a6 a1 a3 a0 a2 a5 a7 a4 a14 a9 a11 a8 a10 a13 a15 a12 a22 a17 a19 a16 a18 a21 a23 a20 mdc txd2 txd0 txd3 txd1 txer mdi0 txen pa1 pa6 pa4 pa7 pa5 pa2 pa0 pa3 pb1 pb6 pb4 pb7 pb5 pb2 pb0 pb3 pd1 pd6 pd4 pd7 pd5 pd2 pd0 pd3 tms -wait -busreq tck -nmi -trstn -reset tdi -f91_wp crs rxd0 rxer rxd3 col rxdv rxd1 rxclk rxd2 txclk -cs1 -mreq -wr -iorq -rd -cs0 -cs2 -cs3 scl sda -reset rxd3 rxd0 mdi0 mdc rxdv rxd2 rxd1 rxer txd3 rxclk txclk txd0 txer col txd2 txd1 txen crs pc7 pc6 pc5 pc4 pc3 pc2 pc1 pc0 rtc_vdd gnd vcc vcc vcc gnd gnd gnd vcc gnd gnd gnd vcc vcc -ledlnk -ledrx vcc -ledrx -ledlnk vcc gnd vcc vcc gnd -f91_wp -reset -trstn tdi tck tms -nmi -busreq -wait d[0:7] pa[0:7] pc[0:7] pd[0:7] pb[0:7] trigout tdo clk_out -halt_slp iicscl -cs3 -iorq -mreq -rd -wr -cs0 -cs1 -cs2 iicsda -busack -instrd a[0:23] rtc_vdd gnd vcc gnd vcc put caps between pairs of u6, 10:11, 51:52, 59:65 and 71:73 as close to the pins as possible cpu and phy this schematic reflects the assembly rev b of the module. the flash memory on page 3 was changed to am29008b for rev d schematic. c10 0.1uf c10 0.1uf r11 49.9 r11 49.9 c4 18pf c4 18pf r16 10k r16 10k c22 0.1uf c22 0.1uf c40 0.001uf c40 0.001uf r18 10k r18 10k c47 0.1uf c47 0.1uf r22 1k r22 1k r21 0 r21 0 c19 0.1uf c19 0.1uf c37 0.001uf c37 0.001uf r13 10k r13 10k c15 0.1uf c15 0.1uf c5 220pf c5 220pf c44 0.1uf c44 0.1uf c26 0.1uf c26 0.1uf y2 50mhz y2 50mhz c51 0.1uf c51 0.1uf c31 0.001uf c31 0.001uf c34 0.001uf c34 0.001uf r31 49.9 r31 49.9 c7 18pf c7 18pf c9 10pf c9 10pf c23 0.1uf c23 0.1uf c41 0.001uf c41 0.001uf l1 3.3uh l1 3.3uh c48 0.1uf c48 0.1uf 1n5817 cr1 1n5817 cr1 2 1 r17 10k 0.1% r17 10k 0.1% r23 0 r23 0 c16 0.1uf c16 0.1uf c20 0.1uf c20 0.1uf c38 0.001uf c38 0.001uf r27 200k r27 200k r14 10k r14 10k r26 499 r26 499 c45 0.1uf c45 0.1uf c27 0.1uf c27 0.1uf c52 0.1uf c52 0.1uf c32 0.001uf c32 0.001uf c35 0.001uf c35 0.001uf c11 12pf c11 12pf r38 10m r38 10m c24 0.1uf c24 0.1uf c42 0.001uf c42 0.001uf r32 49.9 r32 49.9 r28 220 r28 220 r34 330 r34 330 y1 25 mhz y1 25 mhz c29 0.1uf c29 0.1uf r24 0 r24 0 c49 0.1uf c49 0.1uf r25 10k r25 10k c17 0.1uf c17 0.1uf u5 ez80f91 u5 ez80f91 a0 1 a1 2 a2 3 a3 4 a4 5 a5 8 a6 9 a7 10 a8 11 a9 12 a10 13 a11 16 a12 17 a13 18 a14 19 a15 20 a16 21 a17 24 a18 25 a19 26 a20 27 a21 28 a22 29 a23 30 d0 39 d1 40 d2 41 d3 42 d4 43 d5 44 d6 45 d7 46 wait 54 busreq 57 tms 66 tck 67 tdi 69 trstn 71 nmi 56 reset 55 wp 144 iorq 49 mrq 50 rd 51 wr 52 cs0 33 cs1 34 cs2 35 cs3 36 scl 110 sda 109 mii_txd3 126 mii_txd2 127 mii_txd1 128 mii_txd0 129 mii_txen 130 mii_txer 132 mii_mdc 142 mii_mdio 143 mii_crs 124 mii_col 125 mii_rxer 135 mii_rxdv 137 mii_rxd0 138 mii_rxd1 139 mii_rxd2 140 mii_rxd3 141 mii_rxclk 136 mii_txclk 131 filt_in 83 xout 85 xin 86 vdd 6 vdd 14 vdd 22 vdd 31 vdd 47 vdd 59 vdd 81 pll_vdd 87 vdd 88 vdd 98 vdd 112 vdd 122 vdd 133 vss 7 vss 15 vss 23 vss 32 vss 38 vss 48 vss 60 vss 64 vss 72 vss 82 pll_vss 84 vss 89 vss 99 vss 108 vss 113 vss 123 vss 134 pa7_pwm3 121 pa6_pwm2_ec1 120 pa5_pwm1_tout1 119 pa4_pwm0_tout0 118 pa3_pwm3_oc3 117 pa2_pwm2_oc2 116 pa1_pwm1_oc1 115 pa0_pwm0_oc0 114 pb7_mosi 107 pb6_miso 106 pb5_icb3 105 pb4_ica3 104 pb3_sck 103 pb2_ss 102 pb1_ic1 101 pb0_ic0_ec0 100 pc7_ri1 97 pc6_dcd1 96 pc5_dsr1 95 pc4_dtr1 94 pc3_cts1 93 pc2_rts1 92 pc1_rxd1 91 pc0_txd1 90 pd7_ri0 80 pd6_dcd0 79 pd5_dsr0 78 pd4_dtr0 77 pd3_cts0 76 pd2_rts0 75 pd1_rxd0_irrxd 74 pd0_txd0_irtxd 73 halt_slp 65 phi 111 tdo 70 trigout 68 busack 58 instrd 53 rtc_vdd 63 rtc_xout 62 rtc_xin 61 vdd 37 c21 0.1uf c21 0.1uf c39 0.001uf c39 0.001uf y3 32.768khz y3 32.768khz r15 10k r15 10k c46 0.1uf c46 0.1uf c28 0.1uf c28 0.1uf r19 0 r19 0 u6 am79c874 u6 am79c874 pcsb 1 isodef 2 iso 3 refclk 5 burn_in 7 rst 8 pwrdn 9 phyad4_0rxd- 14 phyad3_10rxd+ 15 phyad2_10txd++ 16 phyad1_10txd- 17 phyad0_10txd-- 18 gpio0_10txd-- 19 gpio1_tp125 20 mdio 21 mdc 22 rxclk 30 rxd3 23 rxd2 24 rxd1 25 rxd0 26 rxdv 29 rxer_rxd4 31 txclk_pcsbpclk 33 txd0 37 txd1 38 txd2 39 txd3 40 txen 34 txer_txd4 32 col 41 crs 42 intr 43 tech_sel2 53 tech_sel1 54 tech_sel0 55 anega 56 ibref 72 rptr 61 ledspd0_ledbta_fxsel 44 lecol_scramen 45 ledrx_ledsel 46 ledtx_ledbtb 47 ledlnk_led_10lnk 48 lespd1_ledtxa_clk25en 57 leddpx_ledtxb 58 test3_sdi+ 62 test2 68 test1_fxr+ 67 test0_fxr- 66 fxt+ 69 fxt- 70 xtl- 74 xtl+ 75 tx+ 77 tx- 78 rx+ 64 rx- 63 tgnd1 4 pllgnd 11 ognd1 12 dgnd1 28 dgnd2 35 ognd2 50 crvgnd 51 eqgnd 65 refgnd 71 tgnd2 76 pllvcc 10 ovdd1 13 vdd1 27 vdd2 36 ovdd2 49 crvvcc 52 adovcc 59 eqvcc 60 refvcc 73 tvcc1 79 tvcc2 80 c53 0.1uf c53 0.1uf c18 0.1uf c18 0.1uf c36 0.001uf c36 0.001uf vl1 vl1 c12 12pf c12 12pf c6 0.056uf c6 0.056uf c25 0.1uf c25 0.1uf c43 0.001uf c43 0.001uf c8 5pf c8 5pf r33 49.9 r33 49.9 r35 330 r35 330 p2 hfj11-2450e-l11 p2 hfj11-2450e-l11 tx+ 1 txct 4 tx- 2 rx+ 3 rxct 5 rx- 6 gnd 8 an1 9 ct1 10 ct2 12 an2 11 c30 0.1uf c30 0.1uf c33 0.001uf c33 0.001uf c50 0.1uf c50 0.1uf
ps026102-1207 schematics zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 25 figure 10. zdots schematic diagram?module memory 5 5 4 4 3 3 2 2 1 1 d d c c b b a a d7 d0 a4 a2 a14 a12 a3 d1 d6 a5 a11 -cs1 d5 d2 a6 a18 a7 a10 a0 a17 a13 a16 a9 d3 -rd a15 -wr a8 a1 d4 -wp vcc -flash_en -flashwe -csflash -cs0 a20 a11 dflash3 a1 dflash0 d6 -reset a17 a13 a9 d3 d2 a16 a10 dflash4 d1 -wr a12 a2 d5 gnd -reset -wr a4 a0 -rd a[0..23] a[0..23] a21 a18 a8 dflash1 d7 a3 a14 a7 -cs0 a15 -rd d4 -wp dflash7 a5 dflash5 d0 a19 a6 dflash6 dflash2 -dis_flash -cs1 -csflash d[0:7] a[0:23] -rd -wr -cs0 -dis_flash -reset -flashwe -cs1 gnd vcc vcc vcc vcc vcc vcc vcc vcc vcc vcc memory this schematic reflects the assembly rev b of the module. the flash memory on page 3 was changed to am29008b for rev d schematic. u1e 74lcx04 tssop14 u1e 74lcx04 tssop14 11 10 r29 10k r29 10k u1d 74lcx04 tssop14 u1d 74lcx04 tssop14 9 8 u8 512kx8 sram soj36.400 u8 512kx8 sram soj36.400 oe 31 a18 35 ce 6 a17 34 a4 5 a16 33 i/o0 7 a15 32 a3 4 a2 3 a14 24 a1 2 i/o4 25 a13 23 i/o5 26 n.c. 36 i/o6 29 i/o7 30 a0 1 a12 22 vss 28 we 13 vdd 27 a11 21 i/o1 8 i/o2 11 i/o3 12 a9 18 a8 17 vss 10 n.c. 19 a10 20 a7 16 a6 15 a5 14 vdd 9 u10 sn74cbtlv3861 u10 sn74cbtlv3861 a1 2 a2 3 a3 4 a4 5 a5 6 a6 7 a7 8 a8 9 a9 10 a10 11 b1 22 b2 21 b3 20 b4 19 b5 18 b6 17 b7 16 b8 15 b9 14 b10 13 nc 1 vcc 24 gnd 12 oe 23 r30 10k r30 10k c14 0.001uf c14 0.001uf u11 am29lv008b u11 am29lv008b a0 21 a1 20 a2 19 a3 18 a4 17 a5 16 a6 15 a7 14 a8 8 a9 7 a10 36 a11 6 a12 5 a13 4 a14 3 a15 2 a16 1 a17 40 a18 13 a19 37 reset 10 ry/by 12 oe 24 we 9 ce 22 dq0 25 dq1 26 dq2 27 dq3 28 dq4 32 dq5 33 dq6 34 dq7 35 nc1 11 nc2 38 vcc1 30 vcc2 31 nc3 29 gnd1 23 gnd2 39 c13 0.001uf c13 0.001uf u4c 74lcx32 tssop14 u4c 74lcx32 tssop14 9 10 8
ps026102-1207 customer support zdots ? sbc for ez80acclaim plus! ? connectivity assp product specification 26 customer support for answers to technical questions about the product, documentation, or any other issues with zilog?s offerings, please visit zilog?s knowledge base at http://www.zilog.com/kb . for any comments, detail technical questions, or reporting problems, please visit zilog?s technical support at http://support.zilog.com .

▲Up To Search▲

Price & Availability of 48-1013-01

	To Download 48-1013-01 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .