? semiconductor components industries, llc, 2006 july, 2006 ? rev. 4 1 publication order number: cs3524a/d cs3524a voltage mode pwm control circuit with 200 ma output drivers the cs3524a pwm control circuit retains the same versatile architecture of the industry standard cs3524 (sg3524) while adding substantial improvements. the cs3524 is pin ? compatible with ?non ? a? versions, and in most applications can be directly interchanged. the cs3524a, however, eliminates many of the design restrictions which had previously required additional external circuitry. the cs3524a includes a precision 5.0 v reference trimmed to 1% accuracy (eliminating the need for potentiometer adjustments), an error amplifier with an output voltage swing extending to 5.0 v, and a current sense amplifier useful in either the ground or power supply output lines. the uncommitted 60 v, 200 ma npn output pair greatly enhances the output drive capability. the cs3524a features an undervoltage lockout circuit which disables all internal circuitry (except the reference) until the input voltage has risen to 8.0 v. this holds standby current low until turn ? on, and greatly simplifies the design of low power, off ? line supplies. the turn ? on circuit has approximately 600 mv of hysteresis for jitter free activation. other improvements include a pwm latch that insures freedom from multiple pulsing within a period, even in noisy environments; logic to eliminate double pulsing on a single output, a 200 ns external shutdown capability, and automatic thermal protection from excessive chip temperature. the oscillator circuit is usable to 500 khz and is easier to synchronize with an external clock pulse. features ? precision reference internally trimmed to 1% ? current limit ? undervoltage lockout ? start ? up supply current < 4.0 ma ? output to 200 ma ? 60 v output capability ? wide common ? mode input range for error and current limit amplifiers ? pwm latch insures single pulse per period ? double pulse suppression ? 200 ns shutdown ? guaranteed frequency ? thermal shutdown http://onsemi.com a = assembly location wl, l = wafer lot yy, y = year ww, w = work week so ? 16l dw suffix case 751g 1 16 device package shipping ordering information CS3524AGN16 dip ? 16 25 units/rail cs3524agdw16 so ? 16l 46 units/rail cs3524agdwr16 so ? 16l 1000 tape & reel dip ? 16 n suffix case 648 1 16 marking diagrams 16 1 cs3524a awlyyww pin connections v outb i sense+ e b sync v in ea+ v ref ea ? 1 comp gnd shutdown c t e a r t v outa i sense ? 1 cs3524a awlyyww 16
cs3524a http://onsemi.com 2 figure 1. block diagram v ref v outa e a v outb e b shutdown gnd v in sync r t c t comp ea ? ea+ i sense+ i sense ? osc 5 v reference regulator uv sense ramp clock comp + ? ? + ea cl pwm latch flip flop power to internal circuitry t r s s v in v in 200 mv 1 k 10 k absolute maximum ratings* rating value unit supply voltage (v in ) 40 v collector supply voltage (v cc ) 60 v output current (each output) 200 ma reference output current 50 ma oscillator charging current 5.0 ma power dissipation at t a = 25 c 1000 mw power dissipation at t j = +25 c derate for case temperature above +25 c 2000 16 mw mw/ c storage temperature range ? 65 to +150 c lead temperature soldering wave solder (through hole styles only) note 1 reflow (smd styles only) note 2 260 peak 230 peak c c 1. 10 seconds max. 2. 60 seconds max above 183 c *the maximum package power dissipation must be observed.
cs3524a http://onsemi.com 3 electrical characteristics (0 c t a +70 c, v in = v cc = 20 v; unless otherwise specified.) characteristic test conditions min typ max unit turn ? on characteristics input voltage operating range after turn ? on 8.0 ? 40 v turn ? on threshold ? 5.5 7.5 8.5 v turn ? on current v in turn ? on ? 100 mv ? 2.5 4.0 ma operating current v in = 8.0 to 40 v ? 5.0 10 ma turn ? on hysteresis (note 3) ? ? 0.6 ? v reference section output voltage t a = 25 c 4.9 5.0 5.2 v line regulation v in = 10 to 40 v ? 10 30 mv load regulation i l = 0 to 20 ma ? 20 50 ma temperature stability (note 3) over operating range ? 20 50 mv short circuit current v ref = 0, t a = 25 c ? 80 100 ma output noise voltage (note 3) 10 hz f 10 khz, t a = 25 c ? 40 ? v rms long term stability (note 3) t a = 125 c, 1000 hrs. ? 20 50 mv oscillator section r t = 2700 , c t = 0.01 f; unless otherwise specified initial accuracy t a = 25 c 39 43 47 khz temperature stability (note 3) over operating temperature range ? 1.0 2.0 % minimum frequency r t = 150 k , c t = 0.1 f ? ? 120 hz maximum frequency r t = 2.0 k , c t = 470 pf 500 ? ? khz output amplitude (note 3) t a = 25 c ? 3.5 ? v output pulse width (note 3) t a = 25 c ? 0.5 ? s ramp peak ? 3.3 3.5 3.7 v ramp valley ? 0.7 0.9 1.0 v error amplifier section v cm = 2.5 v; unless otherwise specified input offset voltage ? ? 2.0 10 mv input bias current ? ? 1.0 10 a input offset current ? ? 0.5 1.0 a common mode rejection ratio v cm = 1.5 to 5.5 v 60 75 ? db power supply rejection ratio v in = 10 to 40 v 50 60 ? db output swing minimum total range 0.5 ? 5.0 v open loop voltage gain v out = 1.0 to 4.0 v, r l 10 m 60 80 ? db gain ? bandwidth (note 3) t a = 25 c, a v = 0 db ? 3.0 ? mhz current limit amplifier v sense = v o ; unless otherwise specified input offset voltage t a = 25 c, ea set for max. output 180 200 220 mv input offset voltage over operating temperature range 170 ? 230 mv input bias current ? ? ? 1.0 ? 10 a common mode rejection ratio v sense = 0 to 15 v 50 60 ? db power supply rejection ratio v in = 10 to 40 v 50 60 ? db 3. these parameters are guaranteed by design but not 100% tested in production.
cs3524a http://onsemi.com 4 electrical characteristics (continued) (0 c t a +70 c, v in = v cc = 20 v; unless otherwise specified.) characteristic unit max typ min test conditions current limit amplifier (continued) v sense = v o ; unless otherwise specified output swing minimum total range 0.5 ? 5.0 v open loop voltage gain v out = 1.0 to 4.0 v, r l 10 m 70 80 ? db delay time (note 4) v in = 300 mv ? 300 ? ns output section (each output) collector emitter voltage i c = 100 a 60 80 ? v collector leakage current v ce = 50 v ? 0.1 20 a saturation i c = 20 ma i c = 200 ma ? ? 0.2 1.0 0.4 2.2 v v emitter output voltage i e = 50 ma 17 18 ? v rise time (note 4) t a = 25 c, r = 2.0 k ? 200 ? ns fall time (note 4) t a = 25 c, r = 2.0 k ? 100 ? ns comparator delay (note 4) t a = 25 c, v comp to v out ? 300 ? ns shutdown delay (note 4) t a = 25 c, v shut to v out ? 200 ? ns shutdown threshold t a = 25 c, r c = 2.0 k 0.5 0.7 1.0 v thermal shutdown (note 4) ? ? 165 ? c 4. these parameters are guaranteed by design but not 100% tested in production. typical performance characteristics figure 2. error amplifier voltage gain vs. frequency over rf figure 3. duty cycle vs. input voltage 100 1 k 10 k 100 k 1 m frequency (hz) 80 60 40 20 0 open voltage gain (db) r f = r f = 1 m r f = 300 k r f = 100 k r f = 30 k v in = 20 v t a = 25 c r f is impedance to ground. values below 30 k will begin to limit the maximum duty ? cycle. 0123 5 input voltage v in 50 40 30 0 duty ? cycle (one output) ? % 10 20 4 v in = 20 v r t = 2700 t a = 25 c c t = 10 f c t = 1 f
cs3524a http://onsemi.com 5 figure 4. quiescent supply current vs. supply voltage over temperature figure 5. shutdown delay from pwm comparator 10 20 30 40 50 supply voltage v in (v) 9 7 5 3 1 quiescent current (ma) 10 8 6 4 2 0 0 t a = ? 55 c t a = 25 c t a = 125 c note: outputs off. r t = 0 123 delay time ( s) 20 input (v) 15 10 5 0 5 4 3 2 1 0 output (v) v in = 20 v r l = 2 k t a = 25 c note: minimum input pulse width to latch is 200 ns. output at v oa or v ob input at v ob figure 6. oscillator frequency vs. timing components resistor over timing capacitance 1 m 100 k 10 k 100 oscillator frequency (hz) 1 k 1 2 5 20 100 timing resistor, r t (k ) 50 10 v in = 20 v t a = 25 c f 1.15 r t c t 1. c t = 1.0 nf 2. c t = 3.0 nf 3. c t = 10 nf 4. c t = 30 nf 5. c t = 100 nf 1 2 3 4 5 12 5 20 100 timing capacitor, c t (nf) 50 10 10 5.0 0.1 output dead time ( s) 2.0 1.0 0.5 0.2 v in = 20 v r t = 2700 t a = 25 c note: dead time = osc output pulse width plus output delay figure 7. output dead time vs. timing capacitor value 12 4 delay time ( s) input (v) output (v) 5 6 4 3 2 1 0 0.2 0.1 0 3 0 output at comp overdrive 5% 10% 20% 50% input at i sense+ v in = 20 v, t a = 25 c ea+ = v ref i sense ? = gnd 01 23 delay time ( s) note: minimum input pulse width to latch is 200 ns. input (v) output (v) 5 10 0 1.0 0.5 0 15 20 v in = 20 v r l = 2.0 k t a = 25 c output at v oa or v ob input at shutdown figure 8. current limit amplifier delay figure 9. turn ? off delay from shutdown
cs3524a http://onsemi.com 6 0 50 100 150 output collector current (ma) v ce sat (v) 5 3 2 1 0 4 200 250 t a = 125 c t a = 25 c t a = ? 55 c figure 10. output saturation voltage vs. output current over temperature figure 11. open loop test circuit v ref v outa e a v outb e b shutdown gnd v in sync r t c t comp ea ? ea+ i sense+ i sense ? cs3524a v cc 2 k 1 w 2 k 1 w 2 k shutdown r t c t 0.1 i s 100 k 100 k 10 k 1 k 2 k 0.1 10 k note: the cs3524a should be able to be tested in any 3524 test circuit with two possible exceptions: 1. the higher gain ? bandwidth of the current limit amplifier in the cs3524a may cause oscillations in an uncompensated 3524 test circuit. 2. the effect of the shutdown cannot be seen at the compensation terminal, but must be observed at the outputs.
cs3524a http://onsemi.com 7 package dimensions dip ? 16 n suffix case 648 ? 08 issue r notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. ? a ? b f c s h g d j l m 16 pl seating 18 9 16 k plane ? t ? m a m 0.25 (0.010) t dim min max min max millimeters inches a 0.740 0.770 18.80 19.55 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.021 0.39 0.53 f 0.040 0.70 1.02 1.77 g 0.100 bsc 2.54 bsc h 0.050 bsc 1.27 bsc j 0.008 0.015 0.21 0.38 k 0.110 0.130 2.80 3.30 l 0.295 0.305 7.50 7.74 m 0 10 0 10 s 0.020 0.040 0.51 1.01 so ? 16l dw suffix case 751g ? 03 issue b d 14x b 16x seating plane s a m 0.25 b s t 16 9 8 1 h x 45 m b m 0.25 h 8x e b a e t a1 a l c notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not inlcude mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable dambar protrusion shall be 0.13 total in excess of the b dimension at maximum material condition. dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 10.15 10.45 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90 0 7 package thermal data parameter dip ? 16 so ? 16l unit r jc typical 42 23 c/w r ja typical 80 105 c/w
cs3524a http://onsemi.com 8 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 cs3524a/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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