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  QPL6202 ultra - low noise, high gain lna d ata sheet rev d subject to change without notice - 1 of 8 - www.qorvo.com preliminary package: dfn, 8 - pin 2.0mm x 2. 0 mm product features ? ultra - low noise figure, 0.55 db nf @ 2.3 ghz ? >20 db gain across sdars ? bias adjustable for linearity optimization ? high input power ruggedness, >32 dbm pin max ? + 36 dbm oip3 at 55ma i dd ? unconditionally stable ? integrated shutdown control pin ? maintains off state with high pin drive ? +3v to +5v supply; does not require - vgg general description the QPL6202 is a flat - gain, high - linearity, ultra - low noise amplifier in a small 2 x 2 mm surface - mount package. at 2.3 ghz, the amplifier typically provides 21.2 db gain, +36 dbm oip3 at a 55 ma bias setting, and 0.55 db noise figure. the lna can be biased from a single positive sup ply ranging from 3.3 to 5 .25 volts. the device is housed in a green/rohs - compliant industry - standard 2x2 mm package. the QPL6202 uses a high performance e - phemt process. the low noise amplifier contains an internal active bias to maintain high performance over temperature. this lna integrates a shut - down biasing capability to allow for operation in tdd applications. applications ? sdars functional block diagram top view ordering information part no. description QPL6202sb 5 pc sample bag QPL6202sq 25 piece sample bag QPL6202sr 100 piece 7 sample reel QPL6202tr7 2500 piece 7 sample reel QPL6202pck - 01 evaluation board + 5 pc sample bag ?
QPL6202 ultra - low noise, high gain lna d ata sheet rev d subject to change without notice - 2 of 8 - www.qorvo.com preliminary absolute maximum ratings parameter rating storage temperature ?65 to +150 ? c supply voltage +7v rf input power, cw, 50 ? , t=25 ? c + 33 dbm rf input power, wcdma, 10db par +27 dbm rf input power, cw, off state +33 dbm exceeding any one or a combination of the absolute maximum rating conditions may cause permanent damage to the device. extend ed application of absolute maximum rating conditions to the device may reduce device reliability. recommended operating conditions parameter min typ max units supply voltage (v dd ) 3.3 4.5 5.25 v bias voltage (v b ias ) 3.3 3.6 5.25 v t case ? 40 +105 c tj for >10 6 hours mttf +190 c electrical specifications are measured at specified test conditions. specifications are not guaranteed over all recommended operating conditions. electrical specifications at +25 ? c parameter conditions min typ max units operational frequency range 2320 2345 mhz test frequency 2332 mhz gain 20 .0 21.2 22.4 db input return loss 8.5 db output return loss 17 db noise figure 1 0.55 0. 7 db output p1db +18.5 dbm output ip3 pout =+2 dbm/tone, f =1 mhz +34 +36 dbm power shutdown control (pin 6) on state 0 0.63 v off state (power down) 1.17 v dd v current, i dd 2 on state 55 ma off state (power down) 3 ma shutdown pin current, i sd v pd 1.17 v 140 a switching speed lna on to off 500 ns lna off to on 500 ns thermal resistance, jc channel to case 48 c/w test conditions unless otherwise noted: vdd = +4.5v, vbias = +3.6v, temp=+25c, 2332mhz, 50 system note: 1 ) noise figure data has input trace loss de - embedded 2 ) icq set by external 4 .3k resistor ?
QPL6202 ultra - low noise, high gain lna d ata sheet rev d subject to change without notice - 3 of 8 - www.qorvo.com preliminary applications schematic ? vbias=3.6v icq 40ma 50ma 60ma 70ma 80ma vdd=4.5v r3 7k 4.9k 3.5k 2.7k 2.1k
QPL6202 ultra - low noise, high gain lna d ata sheet rev d subject to change without notice - 4 of 8 - www.qorvo.com preliminary pin configuration and description top view pad no. label description 1 vbias sets the icq bias point for the device. 2 rf in rf input pin. a dc block is required. 6 shut down a high voltage (>1.17v) turns off the device. if the pin is pulled to ground or driven with a voltage less than 0.63v, then the device will operate under lna on state. 7 rf out / dcbias rf output pin. dc bias will also need to be injected through a rf bias choke/inductor for operation. 3, 4, 5, 8 nc no electrical connection. provide grounded land pads for pcb mounting integrity. backside paddle rf/dc gnd rf/dc ground. use recommended via pattern to minimize inductance and thermal resistance; see pcb mounting pattern for suggested footprint. ?
QPL6202 ultra - low noise, high gain lna d ata sheet rev d subject to change without notice - 5 of 8 - www.qorvo.com preliminary performance plots test conditions unless otherwise noted: v dd =+ 4. 5 v, i dd = 50 ma, temp=+25c. noise figure data has input trace loss de - embedded . ?
QPL6202 ultra - low noise, high gain lna d ata sheet rev d subject to change without notice - 6 of 8 - www.qorvo.com preliminary mechanical information marking: part number C 6202 trace code C xxxx notes: 1. all dimensions are in millimeters. angles are in degrees. 2. except where noted, this part outline conforms to jedec standard mo - 220, issue e (variation vggc) for thermally enhanced plastic very thin fine pitch quad flat no lead package (qfn). 3. dimension and tolerance formats conform to asme y14.4m - 1994. 4. the terminal #1 identifier and terminal numbering conform to jesd 95 - 1 spp - 012. ?
QPL6202 ultra - low noise, high gain lna d ata sheet rev d subject to change without notice - 7 of 8 - www.qorvo.com preliminary pcb mounting pattern notes: 1. all dimensions are in millimeters. angles are in degrees. 2. use 1 oz. copper minimum for top and bottom layer metal. 3. vias are required under the backside paddle of this device for proper rf/dc grounding and thermal dissipation. we recommend a 0.35mm (#80/.0135") diameter bit for drilling via holes and a final plated thru diameter of 0.25 mm (0.10). 4. ensure good package backside paddle solder attach for reliable operation and best electrical performance. ?
QPL6202 ultra - low noise, high gain lna d ata sheet rev d subject to change without notice - 8 of 8 - www.qorvo.com preliminary handling precautions parameter rating standard caution! esd - sensitive device esd? C ?human body model (hbm) class 1 b jedec standard jesd22 - a114 esd? C ?charged device model ( cd m) class c 2 jedec jesd22 - c101 msl? C ?moisture sensitivity level level 2 ipc/jedec j - std - 020 solderability compatible with both lead - free (260c max. reflow temp.) and tin/lead (245c max. reflow temp.) soldering processes. solder profiles available upon request. contact plating: nipdau rohs compliance this part is compliant with eu 2002/95/ec rohs directive (restrictions on the use of certain hazardous substances in electrical and electronic equipment). this product also has the following attributes: ? lead free ? ? antimony free ? tbbp - a (c 15 h 12 br 4 0 2 ) free ? pfos free ? svhc free ? qorvo green contact information for the latest specifications, additional product information, worldwide sales and distribution locations : tel: 1 - 844 - 890 - 8163 web: www.qorvo.com email: customer.support@qorvo.com important notice the information contained herein is believed to be reliable; however, qorvo makes no warranties regarding the information con tained herein and assumes no responsibility or liability whatsoever for the use of the information contained herein. all informatio n contained herein is subject to change without notice. customers should obtain and verify the latest relevant information before placing orders for qorvo products. the info rmation contained herein or any use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by such information. this information does not constitute a warranty with respect to t he products described herein, and qorvo hereby disclaims any and all warranties with respect to such products whether express or implied by law, course of dealing, course of performance, usage of trade or otherwise, including the implied warranties of merc hantability and fitness for a particular purpose. without limiting the generality of the foregoing, qorvo products are not warranted or authorized for use as critical componen ts in medical, life - saving, or life - sustaining applications, or other application s where a failure would reasonably be expected to cause severe personal injury or death. copyright 2016 ? qorvo, inc. | qorvo is a registered trademark of qorvo, inc. ? p b


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