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this is information on a product in full production. march 2014 docid026041 rev 1 1/24 CS70 high side current sens e high voltage op amp datasheet - production data features ? independent supply and input common-mode voltages ? wide common-mode operating range: 2.9 v to 70 v in single-supply configuration, -2.1 v to 65 v in dual-supply configuration ? wide common-mode surviving range: -16 v to 75 v (reversed battery and load-dump conditions) ? supply voltage range: 2.7 to 5.5 v in single- supply configuration ? low current consumption: i cc max = 360 a ? pin selectable gain: 20 v/v, 25 v/v, 50 v/v or 100 v/v ? buffered output applications ? wireless battery chargers ? chargers for portable equipment ? precision current sources ? wearable description the CS70 measures a small differential voltage on a high-side shunt resistor and translates it into a ground-referenced output voltage. the gain is adjustable to four different values from 20 v/v up to 100 v/v by two selection pins. wide input common-mode voltage range, low quiescent current, and tiny tssop8 packaging enable use in a wide variety of applications. the input common-mode and power-supply voltages are independent. the common-mode voltage can range from 2.9 v to 70 v in the single- supply configuration or be offset by an adjustable voltage supplied on the vcc- pin in the dual- supply configuration. with a current consumption lower than 360 a and a virtually null input leakage current in standby mode, the power consumption in the applications is minimized. 2 1 3 sel2 vm sel1 6 8 gnd vp 4 ou t 7 vcc- 5 vcc+ tssop8 (plastic package) pin connections (top view) table 1. device summary part number temperature range package packaging marking CS70p - 40 c to +125 c tssop8 tape and reel 103i www.st.com
contents CS70 2/24 docid026041 rev 1 contents 1 application schematic and pin description . . . . . . . . . . . . . . . . . . . . . . 3 2 absolute maximum ratings and operating c onditions . . . . . . . . . . . . . 6 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 electrical characteristics curves: current sense amplif ier . . . . . . . . . 10 5 parameter definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.1 common-mode rejection ratio (cmr) . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.2 supply voltage rejection ratio (svr) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.3 gain (av) and input offset voltage (v os ) . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.4 output voltage drift versus temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.5 input offset drift versus temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.6 output voltage accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6 maximum permissible voltages on pins . . . . . . . . . . . . . . . . . . . . . . . . 18 7 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8.1 tssop8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
docid026041 rev 1 3/24 CS70 application schematic and pin description 24 1 application schematic and pin description the CS70 high-side current sense amplifier can be used in either single- or dual-supply mode. in the single-supply configuration, th e CS70 features a wide 2.9 v to 70 v input common-mode range totally independent of the supply voltage. in the dual-supply range, the common-mode range is shifted by the value of the negative voltage applied on the vcc- pin. for instance, with vcc+ = 5 v and vcc- = -5 v, then the input common-mode range is - 2.1 v to 65 v. figure 1. single-supply configuration schematic am04517v1 5 v vsense load iload rsense common-mode voltage: 2.9 v to 70 v vp vm rg1 rg2 vcc+ vcc sel1 vout load iload rsense rg3 vp vm out rg1 rg2 voltage buffer sense amplifier vcc+ CS70 gnd vcc- k2 controller adc vcc gpio2 gnd sel1 sel2 gpio1
application schematic and pin description CS70 4/24 docid026041 rev 1 figure 2. dual-supply configuration schematic figure 3. common-mode versus supply voltage in dual-supply configuration 5 v vsense vout load iload rsense controller adc gnd vcc gpio1 gpio2 -5 v vp vm vcc+ CS70 out gnd sel1 sel2 vcc- common-mode voltage: -2.1 v to 65 v am04518v1 max = 70 v min = 2.9 v max = 65 v min = -2.1 v v cc- = 0 v v cc- = -5 v max = 60 v min = -7.1 v v cc- = -10 v single-supply dual-supply vicm common-mode voltage operating range am04519
docid026041 rev 1 5/24 CS70 application schematic and pin description 24 table 2 describes the function of each pin. their position is shown in the illustration on the cover page and in figure 1 on page 3 . table 2. pin description symbol type function out analog output the out voltage is proportional to the magnitude of the sense voltage v p -v m . gnd power supply ground line vcc+ positive power supply line. vcc- negative power supply line. vp analog input connection for the external sense resistor. the measured current enters the shunt on the v p side. vm connection for the external sense resistor. the measured current exits the shunt on the v m side. sel1 digital input gain-select pin sel2
absolute maximum ratings and operating conditions CS70 6/24 docid026041 rev 1 2 absolute maximum ratings and operating conditions table 3. absolute maximum ratings symbol parameter value unit v id input pins differential voltage (v p -v m )20 v v in_sense sensing pins input voltages (v p , v m ) (1) 1. these voltage values are measured with respect to the vcc - pin. -16 to 75 v in_sel gain selection pins input voltages (sel1, sel2) (2) 2. these voltage values are measured with respect to the gnd pin. -0.3 to v cc+ +0.3 v cc+ positive supply voltage (2) -0.3 to 7 v cc+ -v cc- dc supply voltage 0 to 15 v out dc output pin voltage (2) -0.3 to v cc+ +0.3 t stg storage temperature -55 to 150 c t j maximum junction temperature 150 r thja tssop8 thermal resistance junction to ambient 120 ???? so8 thermal resistance junction to ambient 125 esd hbm: human body model (3) 3. human body model: a 100 pf capacitor is charged to the specified voltage, then discharged through a 1.5 k ?? resistor between two pins of the device. this is done for all couples of connected pin combinations while the other pins are floating. 2.5 kv mm: machine model (4) 4. machine model: a 200 pf capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 ? ). this is done for all couples of connected pin combinations whil e the other pins are floating. 150 v cdm: charged device model (5) 5. charged device model: all pins plus package are charged together to the specified voltage and then discharged directly to ground. 1.5 kv table 4. operating conditions symbol parameter value unit v cc+ supply voltage in single-supply configuration from t min to t max (v cc- connected to gnd = 0 v) 2.7 to 5.5 v v cc- negative supply voltage in dual-supply configuration from t min to t max - v v cc+ = 5.5 v max -8 to 0 v cc+ =3v max -11 to 0 v icm common-mode voltage range referred to pin vcc - (t min to t max ) 2.9 to 70 v t oper operational temperature range (t min to t max ) -40 to 125 c
docid026041 rev 1 7/24 CS70 electrical characteristics 24 3 electrical characteristics the electrical characteristics given in the fo llowing tables are measured under the following test conditions unless otherwise specified. ? t amb =25 c, v cc+ =5v, v cc- connected to gnd (single-supply configuration). ? v sense =v p -v m =50mv, v m = 12 v, no load on out, all gain configurations. table 5. supply symbol parameter test conditions min. typ. max. unit i cc total supply current v sense = 0 v, t min < t amb < t max - 200 360 a i cc1 total supply current v sense = 50 mv av = 50 v/v t min < t amb < t max 300 480 table 6. input symbol parameter test conditions min. typ. max. unit dc cmr dc common-mode rejection variation of v out versus v icm referred to input (1) 2.9 v< v m < 70 v t min < t amb < t max 90 105 db ac cmr ac common-mode rejection variation of v out versus v icm referred to input (peak-to-peak voltage variation) av = 50 v/v or 100 v/v 2.9 v< v m < 30 v 1 khz sine wave 95 svr supply voltage rejection variation of v out versus v cc (2) sel1 = gnd, sel2 = gnd 2.7 v< v cc < 5.5 v v sense =30mv t min < t amb < t max 85 95 v os input offset voltage (3) t amb = 25 ? c t min < t amb < t max 500 1100 v dv os /dt input offset drift vs. t av = 50 v/v t min < t amb < t max -20 +5 v/c i lk input leakage current v cc =0v t min < t amb < t max 1 a i ib input bias current v sense =0v t min < t amb < t max 10 15 v il logic low voltage threshold (sel1 and sel2) v cc min < v cc < v cc max t min < t amb < t max -0.3 0.5 v v ih logic high voltage threshold (sel1 and sel2) v cc min < v cc < v cc max t min < t amb < t max 1.2 v cc i sel gain-select pins (sel1 and sel2) input bias current sel pin connected to gnd or v cc t min < t amb < t max 400 na 1. see section 5: parameter definitions for the definition of cmr. 2. see section 5 for the definition of svr. 3. see section 5 for the definition of v os .
electrical characteristics CS70 8/24 docid026041 rev 1 table 7. output symbol parameter test cond itions min. typ. max. unit av gain sel1 = gnd, sel2 = gnd sel1 = gnd, sel2 = vcc+ sel1 = vcc+, sel2 = gnd sel1 = vcc+, sel2 = vcc+ 20 25 50 100 v/v ? v out / ? t output voltage drift vs. t (1) av = 50 v/v t min < t amb < t max 240 ppm/c ? v out / ? i out output stage load regulation -10 ma < i out <10 ma i out sink or source current av = 50 v/v 0.3 1.5 mv/ma ? v out total output voltage accuracy (2) v sense =50mv (3) t amb = 25 ? c t min < t amb < t max 2.5 4 % ? v out total output voltage accuracy v sense =90mv (3) t amb = 25 ? c t min < t amb < t max 3.5 5 ? v out total output voltage accuracy v sense =20mv t amb =25 ? c t min < t amb < t max 3.5 5 ? v out total output voltage accuracy v sense =10mv t amb =25 ? c t min < t amb < t max 5.5 8 ? v out total output voltage accuracy v sense =5mv t amb = 25 ? c t min < t amb < t max 10 22 i sc short-circuit current out connected to v cc or gnd 15 26 ma v oh output stage high-state saturation voltage v oh =v cc -v out v sense =1v i out =1ma 85 135 mv v ol output stage low-state saturation voltage v sense =-1 v i out =1ma 80 125 1. see section 5: parameter definitions for the definition of output voltage drift versus temperature. 2. output voltage accuracy is the difference with the expected theoretical output voltage v out-th =av*v sense . see section 5 for a more detailed definition. 3. except for av = 100 v/v.
docid026041 rev 1 9/24 CS70 electrical characteristics 24 table 8. frequency response symbol parameter test cond itions min. typ. max. unit ts response to input differential voltage change. output settling to 1% of final value v sense square pulse applied to generate a variation of vout from 500 mv to 3 v c load =47pf - - -s av = 20 v/v, 3 av = 25 v/v 4 av = 50 v/v 6 av = 100 v/v 10 t sel response to a gain change. output settling to 1% of final value any change of state of sel1 or sel2 pin - 1 -s t rec response to common-mode voltage change. output settling to 1% of final value v cc+= 5 v, vcc-= -5 v v m step change from -2 v to 30 v or 30 v to -2 v 20 sr slew rate v sense =10mv to 100mv 0.4 0.6 - v/s bw 3 db bandwidth c load =47pf v m =12v v sense =50mv av = 50 v/v - 700 - khz table 9. noise symbol parameter test conditions min. typ. max. unit e n equivalent input noise voltage f = 1 khz - 40 - nv/ ?? hz
electrical characteristics curves: current sense amplifier CS70 10/24 docid026041 rev 1 4 electrical characteristics curves: current sense amplifier unless otherwise specified, the test co nditions for the following curves are: ? t amb = 25 c, v cc = 5 v, v sense = v p - v m = 50 mv, v m = 12 v ? no load on out pin figure 4. output voltage vs. vsense figur e 5. output voltage accuracy vs. vsense 0 1 2 3 4 5 6 -20 0 20 40 60 80 100 120 vout (v) vsense (mv) -25 -20 -15 -10 -5 0 5 10 15 20 25 020406080 100 delta in (%) vsense(mv) guaranteed accuracy vs. t typical accuracy guaranteed accuracy @25c figure 6. supply current vs. supply voltage figure 7. supply current vs. vsense 0 50 100 150 200 250 300 350 2.5 3 3.5 4 4.5 5 5.5 icc (a) vcc (v) t = 25 c t = 125 c t = - 40 c 0 50 100 150 200 250 300 350 400 -100 -50 0 50 100 icc (a) vsense (mv) t = - 40c t = 25 c t = 125 c
docid026041 rev 1 11/24 CS70 electrical characteristics curves: current sense amplifier 24 figure 8. vp pin input current vs. vsense figure 9. vn pin input current vs. vsense 0 5 10 15 20 25 30 35 40 -100 -50 0 50 100 ip (a) vsense (mv) t = - 40 c t = 25 c t = 125 c 0 2 4 6 8 10 12 14 16 18 20 -100 -50 0 50 100 im (a) vsense (mv) t = - 40 c t = 25 c t = 125 c figure 10. output stage low-state saturation voltage vs. output current (v sense = -1 v) figure 11. output stage high-state saturation voltage vs. output current (v sense = +1 v) 0 200 400 600 800 1000 1200 02468 10 vol (mv) iout (ma) t = - 40 c t = 25 c t = 125 c output stage sinking current 0 200 400 600 800 1000 1200 -10-8-6-4-2 0 voh (mv) iout (ma) t = - 40 c t = 25 c t = 125 c output stage sourcing current figure 12. output stage load regulation figure 13. step response -6 -5 -4 -3 -2 -1 0 1 -10 -5 0 5 10 iout (ma) t = 25c t = -40c t = 125c output stage sourcing current output stage sinking current vout - (vout @ iout = 0a) (mv) vsense vout vout 500mv/div vsense 50mv/div time base 4s/div
electrical characteristics curves: current sense amplifier CS70 12/24 docid026041 rev 1 figure 16. noise level figure 14. bode diagram figure 15. power supply rejection ratio -30 -20 -10 0 10 20 30 1.e+03 1.e+04 1.e+05 1.e+06 1.e+07 gain (db) frequency (hz) 3655 g% )uhtxhqf\+] 0 20 40 60 80 100 120 noise level (nv/sqrt(hz)) frequency (hz)
docid026041 rev 1 13/24 CS70 parameter definitions 24 5 parameter definitions 5.1 common-mode rejection ratio (cmr) the common-mode rejection ra tio (cmr) measures the ability of the current-sensing amplifier to reject any dc voltage applied on both inputs vp and vm. the cmr is referred back to the input so that its effect can be compared with the applied differential signal. the cmr is defined by the formula: 5.2 supply voltage re jection ratio (svr) the supply-voltage rejection ratio (svr) measures the ab ility of the current-sensing amplifier to reject any variat ion of the supply voltage v cc . the svr is referred back to the input so that its effect can be compared with the applied differential signal. the svr is defined by the formula: 5.3 gain (av) and input offset voltage (v os ) the input offset voltage is defined as the inte rsection between the linear regression of the v out vs. v sense curve with the x-axis (see figure 17 ). if v out1 is the output voltage with v sense =v sense1 and v out2 is the output voltage with v sense =v sense2 , then v os can be calculated with the following formula. cmr 20 ? ? v out ? v icm av ? --------------------------- - log ? = svr 20 ? ? v out ? v cc av ? -------------------------- - log ? = v os v sense1 v sense1 v sense2 ? v out1 v out2 ? ----------------------------------------------- - v out1 ? ?? ?? ? =
parameter definitions CS70 14/24 docid026041 rev 1 figure 17. v out versus v sense characteristics: detail for low v sense values the values of v sense1 and v sense2 used for the input offset calculations are detailed in table 10 . table 10. test conditions for v os voltage calculation av (v/v) v sense1 (mv) v sense2 (mv) 20 50 5 25 50 5 50 50 5 100 40 5 am04520 vos vsense2 vsense vout vsense1 vout_1 vout_2
docid026041 rev 1 15/24 CS70 parameter definitions 24 5.4 output voltage drift versus temperature the output voltage drift versus temperature is defined as the maximum variation of v out with respect to its value at 25 c over the temperature range. it is calculated as follows: with t min < t amb < t max . figure 18 provides a graphical definition of the output voltage drift versus temperature. on this chart, v out is always within the area defined by the maximum and minimum variation of v out versus t, and t = 25 c is considered to be the reference. figure 18. output voltage drift versus temperature (av = 50 v/v v sense =50mv) ? v out ? t ---------------- -max v out t amb ?? v out 25 ? c ?? ? t amb 25 ? c ? ------------------------------------------------------------------------- = -60 -40 -20 0 20 40 60 -60 -40 -20 0 20 40 60 80 100 120 140 vout-vout@25c (mv) t (c)
parameter definitions CS70 16/24 docid026041 rev 1 5.5 input offset drif t versus temperature the input voltage drift versus temperature is defined as the maximum variation of v os with respect to its value at 25 c over the temperature range. it is calculated as follows: with t min < t amb < t max . figure 19 provides a graphical definition of the input offset drift versus temperature. on this chart, v os is always within the area defined by the maximum and minimum variation of v os versus t, and t = 25 c is considered to be the reference. figure 19. input offset drift versus temperature (av = 50 v/v) 5.6 output voltage accuracy the output voltage accuracy is the difference between the actual output voltage and the theoretical output voltage. ideally, the current sensing output voltage should be equal to the input differential voltage multiplied by the theoretical gain, as in the following formula. v out-th =av.v sense the actual value is very slightly different, mainly due to the effects of: ? the input offset voltage v os ? the non-linearity ? v os ? t -------------- -max v os t amb ?? v os 25 ? c ?? ? t amb 25 ? c ? -------------------------------------------------------------------- = -2.5 -2 -1.5 -1 -0.5 0 0.5 1 1.5 -60 -40 -20 0 20 40 60 80 100 120 140 vos-vos@25c (mv) t (c)
docid026041 rev 1 17/24 CS70 parameter definitions 24 figure 20. v out vs. v sense theoretical and actual characteristics the output voltage accuracy, expressed as a percentage, can be calculated with the following formula, with 20 v/v, 25 v/v, 50 v/v or 100 v/v depe nding on the configuration of the sel1 and sel2 pins. vsense 5 mv ideal actual vout am04521 vout accuracy for vsense = 5 mv ? v out abs v out av v sense ? ?? ? ?? av v sense ? ----------------------------------------------------------------------- =
maximum permissible voltages on pins CS70 18/24 docid026041 rev 1 6 maximum permissible voltages on pins the CS70 can be used in either a single or dual supply configuration. the dual-supply configuration is achieved by disconnecting vcc- and gnd, and connecting vcc- to a negative supply. figure 21 illustrates how the absolu te maximum voltages on input pins vp and vm are referred to the v cc - potential, while the maximum voltages on the positive supply pin, gain selection pins, and output pins are referred to the gnd pin. it should also be noted that the maximum voltage between vcc- and vcc+ is limited to 15 v. figure 21. maximum voltages on pins +75 v vp and vm vcc+ -16 v +15 v +7 v vp and vm -0.3 v vcc+ + 0.3 v sel1, sel2 and out sel1, sel2 and out vcc- vcc- gnd vcc+ gnd -0.3v vcc+ am04522
docid026041 rev 1 19/24 CS70 application information 24 7 application information the CS70 can be used to measure current and to feed back the information to a microcontroller. figure 22. single-supply configuration schematic the current from the supply flows to the load through the r sense resistor, causing a voltage drop equal to v sense across r sense . the amplifier?s input currents are negligible , therefore its inverting input voltage is equal to vm. the amplifier's open-loop gain forces its non-inverting input to the same voltage as the inverting input. consequently, the amplifier adjusts the current flowing through r g1 so that the voltage drop across r g1 matches v sense exactly. therefore, the drop across r g1 is: v rg1 =v sense =r sense .i load if i rg1 is the current flowing through r g1 , then i rg1 is given by the formula: i rg1 =v sense /r g1 the i rg1 current flows entirely into resistor r g3 (the input bias current of the buffer is negligible). therefore, the voltage drop on the r g3 resistor can be calculated as follows. v rg3 =r g3 .i rg1 =(r g3 /r g1 ).v sense= k1 .v sense with k1=r g3 /r g1 . the voltage across the r g3 resistor is buffered to the out pin by the voltage buffer, featuring a gain equal to k2. therefore v out can be expressed as: v out =k1.k2.v sense = av .v sense with av= k1.k2 or: v out = av .r sense .i load am04517v1 5 v vsense load iload rsense common-mode voltage: 2.9 v to 70 v vp vm rg1 rg2 vcc+ vcc sel1 vout load iload rsense rg3 vp vm out rg1 rg2 voltage buffer sense amplifier vcc+ CS70 gnd vcc- k2 controller adc vcc gpio2 gnd sel1 sel2 gpio1
application information CS70 20/24 docid026041 rev 1 the resistor ratio, k1 = r g3 /r g1 , is internally set to 20 v/v, and the voltage buffer gain, k2, can be set to 1, 1.25, 2.5, or 5 depending on the voltage applied on the sel1 and sel2 pins. since they define the full-scale ou tput range of the application, the r sense resistor and the amplification gain av are important parameters and must therefore be selected carefully.
docid026041 rev 1 21/24 CS70 package information 24 8 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions a nd product status are available at: www.st.com . ecopack ? is an st trademark.
package information CS70 22/24 docid026041 rev 1 8.1 tssop8 package information figure 23. tssop8 package mechanical drawing table 11. tssop8 package mechanical data ref. dimensions millimeters inches min. typ. max. min. typ. max. a1.200.047 a1 0.05 0.15 0.002 0.006 a2 0.80 1.00 1.05 0.031 0.039 0.041 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.008 d 2.90 3.00 3.10 0.114 0.118 0.122 e 6.20 6.40 6.60 0.244 0.252 0.260 e1 4.30 4.40 4.50 0.169 0.173 0.177 e 0.65 0.0256 k0 80 8 l 0.45 0.60 0.75 0.018 0.024 0.030 l1 1 0.039 aaa 0.10 0.004
docid026041 rev 1 23/24 CS70 revision history 24 9 revision history table 12. document revision history date revision changes 06-mar-2014 1 initial release.
CS70 24/24 docid026041 rev 1 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems wi th product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2014 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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