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| Datasheet File OCR Text: |
| general features ? supports ntsc/pal/secam video decoding ? supports image resolutions up to 768x576 (full pal resolution) ? supports complex clipping of video source ? zero wait state pci burst writes ? field/frame masking support to throttle bandwidth to target ? multiple ycrcb and rgb pixel formats supported on output ? image size scalable down to icon using vertical & horizontal interpolation ?ltering ? multiple composite and s-video inputs ? supports different program control for even and odd ?elds ? supports different color space/scaling factors for even and odd ?elds ? supports planar yuv data format ? support for mapping of video to 225 color palette ? vbi data capture for closed captioning, teletext and intercast data decoding ? auxiliary gpio port to support external control ? fully pci rev. 2.1 compliant ? integrated audio adcs to digitize the composite audio spectrum ? mono line level and mic level audio capture ? audio capture without analog audio cable to sound card bt879 specific features ? full stereo decoding for both tv audio (btsc) and fm radio ? full dbx noise reduction applications ? pc television ? smart pc radio ? intercast receiver ? desktop video phone ? motion video capture ? still frame capture ? vbi data services capture related documents ? fusion technical reference manual ? fusion programmers guide advance information this document contains information on a product under development. the parametric information contains target parameters that are subject to change. 40 mhz adc 40 mhz adc decimation lpf video fifo target pci i/f initiator composite 1 s-video (c) tv fm composite 2 composite s-video (y) mic i 2 s (dig. audio) (bt879) dbx stereo decode high bw audio adc input control gain ultralock? and clock generation video and scaling decode i 2 c gpio composite 3 dma controller audio fifo audio format stream pixel conversion format gpio and digital/video port single-chip video and broadcast audio capture for the pci bus bt878/879 3:1 mux target initiator dma controller the bt878/879 is a complete, low cost, single-chip solution for analog broadcast sig- nal capture on the pci bus. the bt878/879 takes advantage of the pci-based sys- tems high bandwidth and inherent multimedia capability. it is designed to be inter- operable with any other pci multimedia device at the component or board level. the bt878/879 has all the video capture features of bt848a, plus integrated btsc stereo decode, and fm radio capture data processing. the dma capability is enhanced to allow for low latency, digitized audio stream transport. the chip enables dbx-compliment stereo, tv, fm radio, and base-band video and audio as input sources. in addition, the chip simpli?es the computer/broadcast signal interface down to a single pci connection. functional block diagram
cop yright ? 1997 rockwell semiconductor systems. all rights reserv ed. print date: march 1998 rockwell reserv es the right to mak e changes to its products or speci? cations to impro v e performance, reliability , or manuf acturability . information furnished by rockwell semiconductor systems is belie v ed to be accurate and reliable. ho we v er , no responsibility is assumed by rockwell semiconductor systems for its use; nor for an y infringement of patents or other rights of third parties which may result from its use. no license is granted by its implication or otherwise under an y patent or patent rights of rockwell semiconductor systems. rockwell products are not designed or intended for use in life support appliances, de vices, or systems where malfunction of a rockwell product can reasonably be e xpected to result in personal injury or death. rockwell customers using or selling rockwell products for use in such applications do so at their o wn risk and agree to fully indemnify rockwell for an y damages resulting from such improper use or sale. bt is a re gistered trademark of rockwell semiconductor systems. product names or services listed in this publication are for identi? cation purposes only , and may be trademarks or re gistered trademarks of their respecti v e companies. all other marks mentioned herein are the property of their respecti v e holders. speci? cations are subject to change without notice. printed in the united states of america ordering information model number package ambient temperature range bt878kpf 128-pin pqfp 0 c to +70 c BT879KPF 128-pin pqfp 0 c to +70 c iii d879dsa t able of c ontents list of figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix list of t ab les . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xi functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 functional over vie w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 video capture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 a udio capture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 analog video and digital camer a capture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 intel intercast? suppor t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 tv/stereo suppor t (bt897 only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 fm radio stereo suppor t (bt879 only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 video dma channels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 a udio dma channels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 data t r anspor t engine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 pci bus interf ace . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 ultr aloc k? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 scaling and cropping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 input interf ace . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 gener al pur pose i/o (gpio) p or t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 v er tical blanking inter v al data capture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 inter-integ r ated circuit (i 2 c) interf ace . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 ultraloc k? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 the challenge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 oper ation pr inciples of ultr aloc k? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 composite video input formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 y/c separation and chr oma demodulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 video scaling, cr opping, and t emporal decimation . . . . . . . . . . . . . . . . . . . . . . . . . . 19 hor iz ontal and v er tical scaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 field aligned v er tical scaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 luminance scaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 p eaking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 chrominance scaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 iv d879dsa bt878/879 single-chip v ideo and audio captur e for the pci bus t able of c ontents scaling registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 image cropping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 cropping registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 t empor al decimation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 video adjustments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 the hue adjust register (hue) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 the contr ast adjust register (contrast) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 the satur ation adjust registers (sa t_u , sa t_v) . . . . . . . . . . . . . . . . . . . . . . . . . . 32 the br ightness register (bright) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 a utomatic chr ominance gain contr ol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 lo w color detection and remo v al . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 coring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 vbi data output interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 vbi line output mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 video data format con ver sion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 pix el data p ath . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 video control code status data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 ycrcb to rgb con v ersion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 gamma correction remo v al . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 ycrcb sub-sampling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 byte sw apping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 video and contr ol data fifo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 logical organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 fifo data interf ace . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 ph ysical implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 fifo input/output rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 dma contr oller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 t arget memor y . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 risc prog r am setup and synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 risc instr uctions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 comple x clipping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 ex ecuting instr uctions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 fifo ov err un conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 fifo data stream resynchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 multifunction arbiter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 nor mal pci mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 430fx compatibility mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 interf acing with non-pci 2.1 compliant core logic . . . . . . . . . . . . . . . . . . . . . . . . . 59 v d879dsa t able of c ontents bt878/879 single-chip v ideo and audio captur e for the pci bus digital a udio p ac ketiz er . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 a udio fifo memor y and status codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 pci bus latenc y t olerance f or a udio buff er . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 fifo interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 a udio p ac kets and data capture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 digital a udio input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 digital a udio input mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 data p ac ket mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 a udio data formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 a udio dr opout detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 a udio a/d . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 muxing and antialiasing filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 input gain contr ol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 electrical interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 input interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 analog signal selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 multiple x er consider ations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 flash a/d con v er ters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 a/d clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 p o w er-up oper ation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 a utomatic gain controls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 cr ystal inputs and cloc k gener ation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 2x ov ersampling and input filter ing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 pci bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 general purpose i/o (gpio) p or t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 gpio nor mal mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 gpio spi modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 digital video input suppor t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 async hr onous data p arallel p or t interface: ra w data capture . . . . . . . . . . . . . . . . . 88 i 2 c interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 jt a g interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 need f or functional v er i? cation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 jt a g approach to t estability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 optional de vice id register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 v er i? cation with the t ap controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 vi d879dsa bt878/879 single-chip v ideo and audio captur e for the pci bus t able of c ontents pc boar d la y out considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 la y out considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 split planes and v olta g e regulator s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 latc hup a v oidance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 contr ol register de? nitionsCfunction 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 pci con? guration space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 pci con? guration register s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 vendor and device id register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 command and status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 revision id and class code register . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 header type register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 latency timer register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 base address 0 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 subsystem id and subsystem vendor id register . . . . . . . . . . . . . . . . . 103 interrupt line, interrupt pin, min_gnt, max_lat register . . . . . . . . . . . . . 103 device control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 local register s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 device status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 input format register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 temporal decimation register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 msb cropping register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 vertical delay register, lower byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 vertical active register, lower byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 horizontal delay register, lower byte . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 horizontal active register, lower byte . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 horizontal scaling register, upper byte . . . . . . . . . . . . . . . . . . . . . . . . . . 109 horizontal scaling register, lower byte . . . . . . . . . . . . . . . . . . . . . . . . . . 109 brightness control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 miscellaneous control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 luma gain register, lower byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112 chroma (u) gain register, lower byte . . . . . . . . . . . . . . . . . . . . . . . . . . 113 chroma (v) gain register, lower byte . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 hue control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 sc loop control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 white crush up register (wc_up) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 output format register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 vertical scaling register, upper byte (function 0) . . . . . . . . . . . . . . . . . . 119 vertical scaling register, lower byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 test control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 agc delay register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 burst delay register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 adc interface register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 video timing control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122 software reset register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 vii d879dsa t able of c ontents bt878/879 single-chip v ideo and audio captur e for the pci bus white crush down register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 timing generator load byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 timing generator control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 total line count register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 color format register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 color control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126 capture control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127 vbi packet size register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127 vbi packet size / delay register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127 field capture counter-(fcap) register . . . . . . . . . . . . . . . . . . . . . . . . . . 128 pll reference multiplier - pll_f_lo register . . . . . . . . . . . . . . . . . . . . 128 pll reference multiplier - pll_f_hi register . . . . . . . . . . . . . . . . . . . . . 128 integer- pll-xci register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 digital video signal interface format . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 interrupt status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 interrupt mask register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 gpio and dma control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 i 2 c data/control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134 risc program start address register . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 gpio output enable control register . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 risc program counter register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 gpio data i/o register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 contr ol register de? nitionsCfunction 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 pci con? guration space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 pci con? guration register s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139 vendor and device id register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139 command and status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139 revision id and class code register . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 header type register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 latency timer register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 base address 0 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 subsystem id and subsystem vendor id register . . . . . . . . . . . . . . . . . 141 interrupt line, interrupt pin, min_gnt, max_lat register . . . . . . . . . . . . . 141 local register s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142 interrupt status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142 interrupt mask register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144 audio control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144 audio packet lengths register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146 risc program start address register . . . . . . . . . . . . . . . . . . . . . . . . . . . 146 risc program counter register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146 viii d879dsa bt878/879 single-chip v ideo and audio captur e for the pci bus t able of c ontents subsystem v endor id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147 i 2 c ser ial eepr om interf ace . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147 eepr om upload at pci reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147 prog r amming and wr ite-protect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148 register load from bios . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148 p arametric inf ormation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149 dc electrical p arameter s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149 a c electrical p arameter s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152 p ac ka g e mec hanical dra wing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155 appendix: a udio signal spectrums . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157 btsc mts spectrum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157 fm radio spectrum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158 ix d879dsa l ist of f igures bt878/879 single-chip v ideo and audio captur e for the pci bus list of figures figure 1. bt879 detailed block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 figure 2. bt879 audio/video decoder and scaler block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 figure 3. bt879 pinout diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 4. ultr aloc k? beha vior f or ntsc square pix el output . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 5. y/c separation and chroma demodulation for composite video . . . . . . . . . . . . . . . . . . 17 figure 6. y/c separation filter responses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 7. filtering and scaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 8. optional horizontal luma low-pass filter responses . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 9. combined luma notch, 2x oversampling and optional low-pass filter response (ntsc) 20 figure 10. combined luma notch, 2x oversampling and optional low-pass filter response (pal/secam) 21 figure 11. combined luma notch and 2x oversampling filter response . . . . . . . . . . . . . . . . . . . . 21 figure 12. f requency responses f or the f our optional v er tical luma lo w-p ass filters . . . . . . . . . 22 figure 13. p eaking filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 14. luma p eaking filters with 2x ov ersampling filter and luma notch . . . . . . . . . . . . . . . . 24 figure 15. effect of the cropping and active registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 16. regions of the video signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 17. cor ing map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 figure 18. regions of the ntsc video f r ame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 figure 19. regions of the p al video f r ame (fields 1, 2, 5, and 6) . . . . . . . . . . . . . . . . . . . . . . . . . . 34 figure 20. vbi timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 figure 21. vbi section block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 figure 22. video data format converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 figure 23. data fifo bloc k diag r am . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 figure 24. audio/video risc block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 figure 25. example of bt879 performing complex clipping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 figure 26. fifo interf ace . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 figure 27. a udio input timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 figure 28. data p ac k et mode timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 figure 29. a udio data p ath . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 figure 30. typical external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 figure 31. clock options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 figure 32. luma and chroma 2x oversampling filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 figure 33. pci video block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 figure 34. pci audio block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 figure 35. gpio normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 x d879dsa bt878/879 single-chip v ideo and audio captur e for the pci bus l ist of f igures figure 36. gpio spi input mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 figure 37. gpio spi output mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 figure 38. digital video input mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 figure 39. asynchronous data parallel port interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 figure 40. video timing in spi output mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 figure 41. basic timing relationships for spi output mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 figure 42. ccir 656 interf ace to digital input p or t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 figure 43. the relationship betw een scl and sd a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 figure 44. i 2 c t ypical protocol diag r am . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 figure 45. instr uction register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 figure 46. optional regulator circuitr y . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 figure 47. function 0 pci configuration space header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 figure 48. function 1 pci configuration space header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138 figure 49. clock timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152 figure 50. gpio timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153 figure 51. jtag timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154 figure 52. 128-pin pqfp package mechanical drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155 figure 53. btsc mts spectrum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157 figure 54. fm radio spectrum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158 xi d879dsa l ist of t ables bt878/879 single-chip v ideo and audio captur e for the pci bus list of t ab les t ab le 1. a udio/video capture product f amily . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 t ab le 2. pin descr iptions grouped b y pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 t ab le 3. video input f or mats suppor ted b y the bt879 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 t ab le 4. register v alues f or square pix el video input f or mats . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 t ab le 5. scaling ratios f or p opular f or mats using f requency v alues . . . . . . . . . . . . . . . . . . . . . . 27 t ab le 6. color f or mats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 table 7. byte swapping map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 table 8. status bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 table 9. fifo full/almost full counts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 t ab le 10. t ab le of pci bus access latencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 t ab le 11. risc instr uctions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 table 12. audio data formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 table 13. gain control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 t ab le 14. recommended cr ystals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 t ab le 15. synchronous pix el interf ace (spi) gpio signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 t ab le 16. synchronous pix el interf ace (spi) input gpio signals . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 t ab le 17. pin de? nition of gpio p or t when using digital video-in mode . . . . . . . . . . . . . . . . . . . . 86 table 18. device identification register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 table 19. eeprom upload sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147 t ab le 20. recommended oper ating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149 t ab le 21. absolute maxim um ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 t ab le 22. dc char acter istics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151 t ab le 23. cloc k timing p ar ameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152 t ab le 24. gpio spi mode timing p ar ameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152 t ab le 25. p o w er supply current p ar ameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153 t ab le 26. jt a g timing p ar ameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153 t ab le 27. decoder p erf or mance p ar ameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154 xii d879dsa bt878/879 single-chip v ideo and audio captur e for the pci bus l ist of t ables 1 d879dsa f unctional d escription functional over vie w the bt879 video and audio capture chip is a multi-function peripheral component interconnect (pci) de vice intended for +5 v only operation. the video function features a direct memory access (dma)/pci b us master for analog ntsc/p al/secam composite, s-v ideo, and digital ccir656 video capture. the audio function features a completely independent dma/pci b us master for fm ra- dio or tv sound capture. the bt878 and bt879 are based on the bt848a video capture chip. the bt879 is a bt848a upgraded to include v arious audio capture capabilities. the main fea- tures of the bt848a are: ntsc/p al/secam video decoding, multiple ycrcb and rgb pix el formats supported on the output, v ertical blanking interv al (vbi) data capture for closed captioning, telete xt, and intercast data decoding. the com- plete set of video and audio capture features are documented in this speci? cation. t able 1 indicates which audio capture features are added to the bt848a to pro- duce the bt878/bt879. no te: in this speci? cation, bt878 and bt879 are referred to generically as the bt879 , unless the distinction is important to the understanding of a specif- ic v ersion of the chip. figure 1 sho ws a block diagram of the bt879 , and figure 2 sho ws a detailed block diagram of the decoder and scaler sections of the bt879 . t ab le 1. a udio/video capture pr oduct f amil y all features of the bt848a, plus: bt878 bt879 mono line le v el and mic le v el audio capture x x mono tv audio x x full tv stereo decoding f or both tv audio (btsc) and fm audio x full dbx noise reduction x bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 2 f unctional d escription functional over vie w 3 f unctional d escription functional over vie w bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 4 f unctional d escription functional over vie w 5 f unctional d escription functional over vie w bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 6 f unctional d escription functional over vie w 7 f unctional d escription pin descriptions bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 8 f unctional d escription pin descriptions 9 f unctional d escription pin descriptions bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 10 f unctional d escription pin descriptions 11 f unctional d escription pin descriptions bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 12 f unctional d escription pin descriptions 13 f unctional d escription ultraloc k? bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 14 f unctional d escription ultraloc k? 15 f unctional d escription composite video input formats bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 16 f unctional d escription composite video input formats 17 f unctional d escription y/c separation and chr oma demodulation bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 18 f unctional d escription y/c separation and chr oma demodulation 19 f unctional d escription video scaling, cr opping, and t emporal decimation bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 20 f unctional d escription video scaling, cr opping, and t emporal decimation 21 f unctional d escription video scaling, cr opping, and t emporal decimation bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 22 f unctional d escription video scaling, cr opping, and t emporal decimation 23 f unctional d escription video scaling, cr opping, and t emporal decimation bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 24 f unctional d escription video scaling, cr opping, and t emporal decimation 25 f unctional d escription video scaling, cr opping, and t emporal decimation bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 26 f unctional d escription video scaling, cr opping, and t emporal decimation 27 f unctional d escription video scaling, cr opping, and t emporal decimation bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 28 f unctional d escription video scaling, cr opping, and t emporal decimation 29 f unctional d escription video scaling, cr opping, and t emporal decimation bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 30 f unctional d escription video scaling, cr opping, and t emporal decimation 31 f unctional d escription video scaling, cr opping, and t emporal decimation bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 32 f unctional d escription video adjustments 33 f unctional d escription lo w color detection and remo v al bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 34 f unctional d escription vbi data output interface 35 f unctional d escription vbi data output interface bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 36 f unctional d escription vbi data output interface 37 f unctional d escription video data format con ver sion bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 38 f unctional d escription video data format con ver sion 39 f unctional d escription video data format con ver sion bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 40 f unctional d escription video data format con ver sion 41 f unctional d escription video data format con ver sion bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 42 f unctional d escription video and contr ol data fifo 43 f unctional d escription video and contr ol data fifo bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 44 f unctional d escription video and contr ol data fifo 45 f unctional d escription video and contr ol data fifo bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 46 f unctional d escription dma contr oller 47 f unctional d escription dma contr oller bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 48 f unctional d escription dma contr oller 49 f unctional d escription dma contr oller bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 50 f unctional d escription dma contr oller 51 f unctional d escription dma contr oller bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 52 f unctional d escription dma contr oller 53 f unctional d escription dma contr oller bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 54 f unctional d escription dma contr oller 55 f unctional d escription dma contr oller bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 56 f unctional d escription dma contr oller 57 f unctional d escription dma contr oller bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 58 f unctional d escription multifunction arbiter 59 f unctional d escription multifunction arbiter bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 60 f unctional d escription multifunction arbiter 61 d879dsa d igital a udio p acketizer the digital audio p ack etizer (d ap) block decodes and pack etizes se v eral digital audio formats that are input on asclk, alrck, and ad a t a. the bt879 selects either the digital audio input or the digitized audio to mo v e onto the audio fifo and audio dma controller . a udio fifo memor y and status codes the audio fifo is identical to the video 36x35 fifo memory block. the 36 bits allo w for tw o 16-bit samples (or four 8-bit samples) and a 4-bit status nibble. the planar mode fm3 code and the vre code are not generated from the audio pack- etizer . the sol/eol {1-4} codes bound the ? nite size audio pack ets (number of bytes indicated by alp_len). the size of the data byte b uf fers may typically be set to the system memory page sizes. the fm1 and vr o codes bound a ? nite num- ber of pack ets. these delimiter codes are useful for pro viding data deli v ery checks, risc program loop checks, and synchronization. the pxv code is used for all v alid audio samples between the pack etizing codes sol/eol. both the input and output side of the fifo run of f the pci clock. pci bus latenc y t olerance f or a udio buff er the latenc y-ef fecti v e size of the audio fifo is essentially 32 d w ords or 64 sam- ples of 16-bit audio. this allo ws for a maximum pci b us latenc y of 286 m s at 224 khz (381 m s at 149 khz) sample rate before o v er? o w will occur . this latenc y drops to 143 m s when in 8-bit mode, because the rate is 4x and the number of bits is half. the digital audio input w ould tolerate a maximum latenc y of 667 m s at 48 khz 16-bit l,r or 122 m s at 1 mb/s data before fifo o v er? o w . bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 62 d igital a udio p acketizer fifo interface 63 d igital a udio p acketizer a udio p ac kets and data capture bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 64 d igital a udio p acketizer a udio p ac kets and data capture 65 d igital a udio p acketizer digital a udio input bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 66 d igital a udio p acketizer data p ac ket mode 67 d igital a udio p acketizer a udio data formats bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 68 d igital a udio p acketizer a udio dr opout detection 69 d879dsa a udio a/d muxing and antialiasing filtering before entering the audio a/d, the tv , fm, and microphone/line audio inputs are selected by a_sel and multiple x ed. the mux selects are break-before-mak e. if a_sel is set to 3, no mux is enabled. thus the smxc pin can be used as a direct connect to the pre-amp (bypass mux) if only one analog input is required. refer to audio control re gister on page 144 for re gister information. the smxc pad leads directly to the single-ended dif ferential con v erter . the resis- ti v e load seen by the audio inputs is approximately 20 k w . input gain contr ol the audio frequenc y (af) output le v el from the tv tuners range from 250 mv rms to 750 mv rms , typically riding on a 2 vdc of fset. if the a/d nominal operating point is 0.5 v rms (1.414 v p-p ), then the input g ain needs to v ary from C3.5 db to +6.0 db. the input signal is g ained in discrete linear steps via a_gain[3:0]. t able 13 sho ws the calculated g ain v alues. the a_gain v alue is set in audio control re g- ister on page 144 . t ab le 13. gain contr ol (1 of 2) a_gain input gain db nominal input v rms v p-p 0 0.500 C6.02 1.000 2.828 1 0.667 C3.52 0.750 2.121 2 0.833 C1.58 0.600 1.697 3 1.000 0.00 0.500 1.414 4 1.167 1.34 0.429 1.212 bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 70 a udio a/d input gain contr ol 71 d879dsa e lectrical i nterfaces input interface analog signal selection the bt879 contains an on-chip 4:1 mux (mux[3:0]) that can be used to switch be- tween four composite sources or three composite sources and one s-v ideo source. in the ? rst con? guration, connect the inputs of the mux to the four composite sources. in the second con? guration, connect three inputs to the composite sources and the other input to the luma component of the s-v ideo connector . when an s-v ideo source is input to the bt879 , the luma component is fed through the input analog multiple x er , and the chroma component is fed directly into the c input pin. an automatic g ain control circuit enables the bt879 to compensate for nonstandard amplitudes in the analog signal input. figure 30 sho ws the bt879 s typical e xternal circuitry . bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 72 e lectrical i nterfaces input interface 73 e lectrical i nterfaces input interface bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 74 e lectrical i nterfaces input interface 75 e lectrical i nterfaces input interface bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 76 e lectrical i nterfaces input interface 77 e lectrical i nterfaces pci bus interface bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 78 e lectrical i nterfaces pci bus interface 79 e lectrical i nterfaces general purpose i/o (gpio) p or t bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 80 e lectrical i nterfaces general purpose i/o (gpio) p or t 81 e lectrical i nterfaces general purpose i/o (gpio) p or t bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 82 e lectrical i nterfaces general purpose i/o (gpio) p or t 83 e lectrical i nterfaces general purpose i/o (gpio) p or t bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 84 e lectrical i nterfaces general purpose i/o (gpio) p or t 85 e lectrical i nterfaces general purpose i/o (gpio) p or t bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 86 e lectrical i nterfaces general purpose i/o (gpio) p or t 87 e lectrical i nterfaces general purpose i/o (gpio) p or t bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 88 e lectrical i nterfaces async hr onous data p arallel p or t interface: ra w data capture 89 e lectrical i nterfaces i 2 c interface bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 90 e lectrical i nterfaces i 2 c interface 91 e lectrical i nterfaces i 2 c interface bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 92 e lectrical i nterfaces jt a g interface 93 e lectrical i nterfaces jt a g interface bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 94 e lectrical i nterfaces jt a g interface 95 d879dsa pc b oard l ayout c onsiderations la y out considerations the pc board layout should be optimized for lo west noise on the bt879 po wer and ground lines. route digital traces a w ay from analog traces. all shields must be connected to the ground plane with lo w impedance connection. use shielded con- nectors. capacitor s from the follo wing pins to ground, place bypass capacitors as close to the bt879 as possible (using 0.1 m f ceramic capacitors): additionally , place bypass capacitors from all other v oltage pins to ground (us- ing 0.1 m f ceramic capacitors) as close to the bt879, where possible. also, when- e v er possible, place traces from all po wer pins to a bypass capacitor on the component side, in addition to an y feedthrough. finally , place traces from all ground pins to a bypass capacitor on the component side, in addition to an y feedthrough, when possible. ensure that there is ample ground plane under the bt879. mak e wide paths of copper under and around the bt879 if possible. a v oid creating a cut in the plane with feed-throughs: instead, disperse them. also ensure that there is ample po wer plane under the bt879. mak e wide paths of copper under and around the bt879 if possible. a v oid creating a cut in the plane with feed-throughs: instead, disperse them. t o ? ll: ? copper ? ll ground on the component side ? po wer ? ll on the circuit side of tw o layer boards ? ground ? ll on both sides of 4 or more layer boards vbb pin 95 vbb pin 101 v aa pin 110 v aa pin 115 v aa pin 117 bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 96 pc b oard l ayout c onsiderations la y out considerations 97 pc b oard l ayout c onsiderations split planes and v olta g e regulator s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 98 pc b oard l ayout c onsiderations latc hup a v oidance 99 d879dsa c ontrol r egister d efinitions Cf unction 0 the bt879 supports tw o types of address spaces function 0 and function 1. this chapter de? nes function 0. the con- ? guration address space includes the prede? ned pci con? guration re gisters. the memory address space includes all the local re gisters used by bt879 to control the remaining portions of the de vice. both the pci con? guration address space and the memory address space start at memory location 0x00. the pci-based system distinguishes the tw o ad- dress spaces based on the initialization de vice select, pci address, and command signals that are issued during the appropriate softw are commands. pci con? guration space the pci con? guration space de? nes the re gisters used to interf ace between the host and the pci local b us. since the bt879 is a multifunction de vice, it operates within tw o function de? nitions during a con? guration type 0 transaction. function 0 responds as a multimedia video de vice. each function has its o wn address space. ad[10:8] indicate which function the pci b us is addressing. ad[10:8] = 000 speci? es function 0. the re gister de? nitions in this chapter apply only to function 0. the con? guration space re gisters are stored in d w ords and de? ned by byte addresses. therefore, a re gister one byte in length can ha v e a bit de? nition other than [7:0] (for e xample [31:24]), depending on its location in the con- ? guration space. f or a discussion on con? guration c ycle addressing, refer to section 3.6.4.1 of the pci local bus speci? cation, revision 2.1 . the con? guration space is accessible at all times e v en though it is not typically accessed during normal operation. these re gisters are normally accessed by the po wer on self t est (post) code and by the de vice dri v er during ini- tialization time. softw are will, ho we v er , read the status re gister during normal operation when a pci b us error occurs and is detected by bt879 . the con? guration space is accessed when the initialization de vice select (idsel) pin is high, and ad[1:0] = 00; otherwise, the c ycle is ignored. the con? guration re gister addresses are each of fset by 4, since ad[1:0] = 00. bt879 supports b urst r/w c ycles. write operations to reserv ed, unimplemented, or read-only re gisters/bits com- plete normally with the data discarded. read accesses to reserv ed or unimplemented re gisters/bits return a data v alue equal to 0. internal addressing of bt879 re gisters occurs via ad[7:2] and the byte enable bits of the pci b us. the 8-bit byte address for each of the follo wing re gister locations is {ad[7:2], 00}. cardbus cis pointer re gisters are not implemented in the bt879 . user -de? nable features, bist , cache line size, and expansion r om base address re gister are also not supported. this section de? nes the or g anization of the re gisters within the 64 byte prede? ned header portion of the con? gu- ration space. figure 47 sho ws the con? guration space header . f or details on the pci b us, refer to the pci local bus speci? cation, revision 2.1 . bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 100 c ontrol r egister d efinitions Cf unction 0 pci con? guration space 101 c ontrol r egister d efinitions Cf unction 0 pci con? guration register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 102 c ontrol r egister d efinitions Cf unction 0 pci con? guration register s 103 c ontrol r egister d efinitions Cf unction 0 pci con? guration register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 104 c ontrol r egister d efinitions Cf unction 0 pci con? guration register s 105 c ontrol r egister d efinitions Cf unction 0 local register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 106 c ontrol r egister d efinitions Cf unction 0 local register s 107 c ontrol r egister d efinitions Cf unction 0 local register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 108 c ontrol r egister d efinitions Cf unction 0 local register s 109 c ontrol r egister d efinitions Cf unction 0 local register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 110 c ontrol r egister d efinitions Cf unction 0 local register s 111 c ontrol r egister d efinitions Cf unction 0 local register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 112 c ontrol r egister d efinitions Cf unction 0 local register s 113 c ontrol r egister d efinitions Cf unction 0 local register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 114 c ontrol r egister d efinitions Cf unction 0 local register s 115 c ontrol r egister d efinitions Cf unction 0 local register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 116 c ontrol r egister d efinitions Cf unction 0 local register s 117 c ontrol r egister d efinitions Cf unction 0 local register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 118 c ontrol r egister d efinitions Cf unction 0 local register s 119 c ontrol r egister d efinitions Cf unction 0 local register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 120 c ontrol r egister d efinitions Cf unction 0 local register s 121 c ontrol r egister d efinitions Cf unction 0 local register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 122 c ontrol r egister d efinitions Cf unction 0 local register s 123 c ontrol r egister d efinitions Cf unction 0 local register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 124 c ontrol r egister d efinitions Cf unction 0 local register s 125 c ontrol r egister d efinitions Cf unction 0 local register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 126 c ontrol r egister d efinitions Cf unction 0 local register s 127 c ontrol r egister d efinitions Cf unction 0 local register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 128 c ontrol r egister d efinitions Cf unction 0 local register s 129 c ontrol r egister d efinitions Cf unction 0 local register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 130 c ontrol r egister d efinitions Cf unction 0 local register s 131 c ontrol r egister d efinitions Cf unction 0 local register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 132 c ontrol r egister d efinitions Cf unction 0 local register s 133 c ontrol r egister d efinitions Cf unction 0 local register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 134 c ontrol r egister d efinitions Cf unction 0 local register s 135 c ontrol r egister d efinitions Cf unction 0 local register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 136 c ontrol r egister d efinitions Cf unction 0 local register s 137 d879dsa c ontrol r egister d efinitions Cf unction 1 the second address space that will be discussed is function 1. as in the pre vious chapter , the con? guration address space includes the pre-de? ned pci con? guration re gisters. the memory address space includes all the local re gisters used by bt879 to control the remaining portions of the de vice. both the pci con? guration address space and the mem- ory address space start at memory location 0x00. the pci-based system distinguishes the tw o address spaces based on the initialization de vice select, pci address, and command signals that are issued during the appropriate softw are commands. pci con? guration space the pci con? guration space de? nes the re gisters used to interf ace between the host and the pci local b us. function 1 responds as a multimedia de vice. each function has its o wn address space. ad[10:8] indicate which function the pci b us is addressing. ad[10:8] = 001 speci? es function 1. the re gister de? nitions in this chapter apply only to function 1. the con? guration space re gisters are described in the pre vious chapter . f or a discussion on con? guration c ycle ad- dressing, refer to section 3.6.4.1 of the pci local bus speci? cation, revision 2.1 . the con? guration space is accessible at all times e v en though it is not typically accessed during normal operation. these re gisters are normally accessed by the po wer on self t est (post) code and by the de vice dri v er during ini- tialization time. softw are will, ho we v er , read the status re gister during normal operation when a pci b us error occurs and is detected by bt879 . the con? guration space is accessed when the initialization de vice select (idsel) pin is high, and ad[1:0] = 00; otherwise, the c ycle is ignored. the con? guration re gister addresses are each of fset by 4, since ad[1:0] = 00. bt879 supports b urst r/w c ycles. write operations to reserv ed, unimplemented, or read-only re gisters/bits com- plete normally with the data discarded. read accesses to reserv ed or unimplemented re gisters/bits return a data v alue equal to 0. internal addressing of bt879 re gisters occurs via ad[7:2] and the byte enable bits of the pci b us. the 8-bit byte address for each of the follo wing re gister locations is {ad[7:2], 00}. cardbus cis pointer re gisters are not implemented in the bt879 . user -de? nable features, bist , cache line size, and expansion r om base address re gister are also not supported. this section de? nes the or g anization of the re gisters within the 64 byte prede? ned header portion of the con? gu- ration space. figure 48 sho ws the con? guration space header . f or details on the pci b us, refer to the pci local bus speci? cation, revision 2.1 . bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 138 c ontrol r egister d efinitions Cf unction 1 pci con? guration space 139 c ontrol r egister d efinitions Cf unction 1 pci con? guration register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 140 c ontrol r egister d efinitions Cf unction 1 pci con? guration register s 141 c ontrol r egister d efinitions Cf unction 1 pci con? guration register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 142 c ontrol r egister d efinitions Cf unction 1 local register s 143 c ontrol r egister d efinitions Cf unction 1 local register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 144 c ontrol r egister d efinitions Cf unction 1 local register s 145 c ontrol r egister d efinitions Cf unction 1 local register s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 146 c ontrol r egister d efinitions Cf unction 1 local register s 147 d879dsa s ubsystem v endor id pci con? guration header location 0x20 speci? es the subsystem v endor id and the subsystem id. if an e xternal eepr om is present, the subsystem v endor id and subsystem id are uploaded. if an e xternal eepr om is not present, the 32 bits of the header re gister def ault to 0x0000, and the re gister can be programmed using bios. this chapter de? nes the subsystem v endor id con? guration with and without an eepr om present. f or more details on the function 1 de? nition, refer to pci con? guration space on page 99 . the function 0 subsystem v endor id re gisters are de? ned starting on page 103 , and the function 1 subsystem v endor id re gisters are de? ned starting on page 141 . i 2 c serial eepr om interface the e xternal eepr om must reside on the i 2 c b us (sd a,scl). this interf ace sup- ports ics equi v alent to the 24c02 or 24c02a 2 k bit 5 v cmos serial eepr om. the 7-bit sla v e de vice address is 1010000. the eepr om can be read an ytime us- ing the i 2 c hardw are or softw are modes. the read transaction sequence w ould be: st ar t , 0xa0, 8-bit byte address, st ar t , 0xa1, 8-bit read data, follo wed by (master n a ck &) st op . thus, a normal 2-byte write transaction without st op follo wed by a 2-byte read transaction will allo w random access to a data byte. eepr om upload at pci reset the 32-bit subsystem ids are read from the eepr om by taking control of the i 2 c circuit just after pci reset and performing a 4-byte sequential read access transac- tion in the 100 khz mode, starting at address 0xfc. the full sequence is sho wn in t able 19 . t ab le 19. eepr om upload sequence (1 of 2) command description st ar t 0xa0 wr ite control b yte with sla v e chip address a ck ac kno wledge from sla v e 0xfc data b yte address , points to subsystem id bits[15:8] a ck ac kno wledge from sla v e st ar t repeated star t 0xa1 read control b yte with sla v e chip address bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 148 s ubsystem v endor id pr ogramming and write-pr otect 149 d879dsa p arametric i nformation dc electrical p arameter s dc electrical parameters are speci? ed in t ables 20 through 22 . t ab le 20. recommended operating conditions p arameter symbol min t yp max units p o w er supply analog v aa , v bb 4.75 5.00 5.25 v p o w er supply digital v dd 4.75 5.00 5.25 v maxim um d |v dd C v aa | 0.5 v mux0, mux1, mux2, and mux3 input range (ac coupling required) 0.5 1.00 2.00 v cin amplitude range (ac coupling required) 0.5 1.00 2.00 v stv , sfm, sml input range (ac coupling required) 0.5 1.00 v rms ambient oper ating t emper ature t a 0 +70 ?c bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 150 p arametric i nformation dc electrical p arameter s 151 p arametric i nformation dc electrical p arameter s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 152 p arametric i nformation a c electrical p arameter s 153 p arametric i nformation a c electrical p arameter s bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 154 p arametric i nformation a c electrical p arameter s 155 p arametric i nformation p ac ka g e mec hanical dra wing bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 156 p arametric i nformation p ac ka g e mec hanical dra wing 157 d879dsa a ppendix : a udio s ignal s pectrums btsc mts spectrum figure 53 illustrates the btsc mts spectrum: ntsc fm sound carrier is at 4.5 mhz and composite multiple x signal fm carrier peak de viation is at 73 khz. figure 53. btsc mts spectrum f h 2f h 3f h 4f h 5f h 6f h 6.5f h l + r l - r sap pro 88.671 khz fm : dbx am-dbs-sc : dbx encoded pre- emphasiz ed 68.671 khz 16.469 khz 15.0 khz 46.469 khz bt878/879 single-chip v ideo and br oadcast audio captur e for the pci bus 158 a ppendix : a udio s ignal s pectrums fm radio spectrum 159 a ppendix : a udio s ignal s pectrums fm radio spectrum url address www .nb.rockwell.com e-mail address literature@nb.rockwell.com for more information: call 1-800-854-8099 international information: call 1-714-221-6996 headquarters rockwell semiconductor systems inc. 4311 jamboree road, p .o. box c newport beach, ca 92658-8902 phone: (714) 221-4600 fax: (714) 221-6375 european headquarters rockwell semiconductor systems s.a.r.l. les t aissounieres b1 1680 route des dolines bp 283 06905 sophia antipolis cedex france phone: 00.33.4.93.00.33.35 fax: 00.33.4.93.00.33.03 asia pacific headquarters 1, kallang sector , #07-04/06 kolam a yer industrial park singapore, 1334 phone: 011-65-841-3801 fax: 011-65-841-3802 us southwest phone: (714) 222-9119 fax: (714) 222-0620 us los angeles phone: (805) 376-0559 fax: (805) 376-8180 us south central phone: (972) 479-9310 fax: (972) 479-9317 us southeast phone: (770) 393-1830 fax: (770) 395-1419 us florida/south america phone: (813) 538-8837 fax: (813) 531-3031 us northwest phone: (408) 249-9696 fax: (408) 249-6518 us north central phone: (630) 773-3454 fax: (630) 773-3907 us northeast phone: (508) 692-7660 fax: (508) 692-8185 europe mediterranean phone: (39-2) 93179911 fax: (39-2) 93179913 europe north phone: (44-1) 344 486444 fax: (44-1) 344 486555 europe south phone: (33-1) 49 06 39 80 fax: (33-1) 49 06 39 90 europe central phone: (49-89) 829-1320 fax: (49-89) 834-2734 australia phone: (61-2) 9869-4088 direct fax: (61-2) 9869-4077 hong kong phone: (852) 2 827-0181 fax: (852) 2 827-6488 japan phone: (81-3) 5371 1551 fax: (81-3) 5371 1501 korea phone: (82-2) 565-2880 fax: (82-2) 565-1440 singapore phone: (65) 737-7355 fax: (65) 737-9077 t aiwan phone: (886-2) 720-0282 fax: (886-2) 757-6760 an829a_? printed in usa l879_a |
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