cystech electronics corp. spec. no. : c396v8 issued date : 2013.08.09 revised date : 2013.08.14 page no. : 1/9 MTB17A03V8 cystek product specification dual n-channel logic level enhancement mode mosfet MTB17A03V8 bv dss 30v i d 7a v gs =10v, i d =6a 16m r dson(typ) 25m v gs =4.5v, i d =4a description the MTB17A03V8 consists of two n-channe l enhancement-mode mosfets in a dfn3 3 package, providing the designer with the be st combination of fast switchi ng, ruggedized device design, low on-resistance and cost effectiveness. features ? single drive requirement ? low on-resistance ? fast switching characteristic ? dynamic dv/dt rating ? repetitive avalanche rated ? pb-free lead plating and halogen-free package equivalent circuit outline ordering information device package shipping MTB17A03V8-t1-g dfn3 3 (pb-free lead plating an d halogen-free package) 3000 pcs / tape & reel dfn3 3 pin 1 MTB17A03V8 g gate d drain ssource
cystech electronics corp. spec. no. : c396v8 issued date : 2013.08.09 revised date : 2013.08.14 page no. : 2/9 MTB17A03V8 cystek product specification the following characteristi cs apply to each mosfet. absolute maximum ratings (ta=25 c, unless otherwise specified) parameter symbol limits unit drain-source voltage v ds 30 gate-source voltage v gs 20 v continuous drain current @ v gs =10v, t a =25 c 7 continuous drain current @ v gs =10v, t a =70 c i d 5.6 pulsed drain current i dm 30 *1 a single device operation 1.5 *2 total power dissipation single device value at dual operation p d 1.24 *2 w operating junction and storage temp erature range tj, tstg -55~+150 c thermal data parameter symbol value unit max. thermal resistance, junction-to-amb ient, single device operation 84 *2 max. thermal resistance, junction-to-amb ient, single device value at dual operation r th,j-a 101 *2 c/w note : 1. pulse width limited by maximum junction temperature. 2. surface mounted on a 1 in2 pad of 2oz copper, t 5s. in practice r th,j-a will be determined by customer?s pcb characteristics. 216 c/w when mounted on a minimum pad of 2 oz. copper. characteristics (t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 30 - - v gs =0v, i d =250 a v gs(th) 1 1.7 2.5 v v ds = v gs , i d =250 a g fs *1 - 8.5 - s v ds =5v, i d =6a i gss - - 100 na v gs = 20v - - 1 v ds =24v, v gs =0 i dss - - 25 a v ds =24v, v gs =0, tj=125 c - 16 25 v gs =10v, i d =6a r ds(on) *1 - 25 35 m v gs =4.5v, i d =4a dynamic ciss - 715 - coss - 76 - crss - 66 - pf v ds =15v, v gs =0v, f=1mhz qg *1, 2 - 12 - qgs *1, 2 - 2.4 - qgd *1, 2 - 3.3 - nc v ds =15v, v gs =10v, i d =7a t d(on) *1, 2 - 7.5 - tr *1, 2 - 12 - t d(off) *1, 2 - 21 - t f *1, 2 - 7 - ns v ds =15v, i d =1a, v gs =10v, r gs =6
cystech electronics corp. spec. no. : c396v8 issued date : 2013.08.09 revised date : 2013.08.14 page no. : 3/9 MTB17A03V8 cystek product specification characteristics (t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions source-drain diode i s *1 - - 2.3 i sm *3 - - 9.2 a v sd *1 - 0.78 1.2 v i s =2.3a, v gs =0v trr - 50 - ns qrr - 2 - nc i f =2.3a, di f /dt=100a/ s note : *1.pulse test : pulse width 300 s, duty cycle 2% *2.independent of operating temperature *3.pulse width limited by maximum junction temperature. recommended soldering footprint unit : mm
cystech electronics corp. spec. no. : c396v8 issued date : 2013.08.09 revised date : 2013.08.14 page no. : 4/9 MTB17A03V8 cystek product specification typical characteristics typical output characteristics 0 5 10 15 20 25 30 01234 5 brekdown voltage vs junction temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v 10v,9v,8v,7v,6v,5v vds, drain-source voltage(v) i d , drain current (a) v gs =4v v gs =3v static drain-source on-state resistance vs drain current 10 100 1000 0.01 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =3v v gs =10v v gs =4.5v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 04812162 i dr , reverse drain current(a) v sd , source-drain voltage(v) 0 tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 40 80 120 160 200 240 280 024681 0 drain-source on-state resistance vs junction tempearture 0.4 0.8 1.2 1.6 2 2.4 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =4.5v, i d =4a v gs =10v, i d =6a v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =6a i d =4a
cystech electronics corp. spec. no. : c396v8 issued date : 2013.08.09 revised date : 2013.08.14 page no. : 5/9 MTB17A03V8 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 10000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 i d , drain current(a) g fs , forward transfer admittance(s) ta=25c pulsed v ds =10 v v ds =5v v ds =15v gate charge characteristics 0 2 4 6 8 10 024681012 qg, total gate charge(nc) v gs , gate-source voltage(v) i d =7a v ds =15v v ds =10v v ds =5v maximum safe operating area 0.01 0.1 1 10 100 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current(a) t a =25c, tj=150c v gs =10v, r ja =84c/w single pulse dc 100ms r dson limite 100 s 1ms 1s 10ms maximum drain current vs junction temperature 0 1 2 3 4 5 6 7 8 9 25 50 75 100 125 150 175 tj, junction temperature(c) i d , maximum drain current(a) t a =25c, v gs =10v, r ja =84c/w
cystech electronics corp. spec. no. : c396v8 issued date : 2013.08.09 revised date : 2013.08.14 page no. : 6/9 MTB17A03V8 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 5 10 15 20 25 30 012345 v gs , gate-source voltage(v) i d , drain current(a) v ds =10v single pulse power rating, junction to ambient (note on page 2) 0 10 20 30 40 50 0.001 0.01 0.1 1 10 100 1000 pulse width(s) power (w) t j(max) =150c t a =25c ja =84c/w transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *r ja (t) 4.r ja =84c/w
cystech electronics corp. spec. no. : c396v8 issued date : 2013.08.09 revised date : 2013.08.14 page no. : 7/9 MTB17A03V8 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c396v8 issued date : 2013.08.09 revised date : 2013.08.14 page no. : 8/9 MTB17A03V8 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
spec. no. : c396v8 issued date : 2013.08.09 revised date : 2013.08.14 page no. : 9/9 cystech electronics corp. MTB17A03V8 cystek product specification dfn3 3 dimension millimeters marking: inches millimeters inches dim min. max. min. max. dim min. max. min. max. a 0.650 0.850 0.026 0.033 b 0.200 0.400 0.008 0.016 a1 0.152 ref 0.006 ref e 0.550 0.750 0.022 0.030 a2 0.000 0.050 0.000 0.002 l 0.300 0.500 0.012 0.020 d 2.900 3.100 0.114 0.122 l1 0.180 0.480 0.007 0.019 d1 0.935 1.135 0.037 0.045 l2 0.000 0.100 0.000 0.004 d2 0.280 0.480 0.011 0.019 l3 0.000 0.100 0.000 0.004 e 2.900 3.100 0.114 0.122 h 0.315 0.515 0.012 0.020 e1 3.150 3.450 0.124 0.136 9 13 9 13 e2 1.535 1.935 0.060 0.076 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . 8-lead dfn3 3 plastic package cystek package code: v8 date code s1 g1 s2 g2 d1 d1 d2 d2 b17 a03
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