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  cystech electronics corp. spec. no. : c080i3 issued date : 2016.07.19 revised date : page no. : 1/10 MTN4N65CI3 cystek product specification n-channel enhancement mode power mosfet MTN4N65CI3 bv dss 650v i d @v gs =10v, t c =25 c 4a i d @v gs =10v, t c =100 c 2.4a r ds(on) @v gs =10v, i d =2a 1.8 (typ) features ? low on resistance ? simple drive requirement ? low gate charge ? fast switching characteristic ? pb-free lead plating and halogen-free package applications ? open framed power supply ? adapter ? stb symbol outline ordering information device package shipping MTN4N65CI3-0-ua-g to-251 (rohs compliant and halogen-free package) 80 pcs/tube, 50 tubes/box MTN4N65CI3 to-251 g gate d drain ssource g d s environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, ua : 80 pcs / tube, 50 tubes/box product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c080i3 issued date : 2016.07.19 revised date : page no. : 2/10 MTN4N65CI3 cystek product specification absolute maximum ratings (t c =25 c) parameter symbol limits unit drain-source voltage v ds 650 gate-source voltage v gs 30 v continuous drain current @ v gs =10v, t c =25 c 4* continuous drain current @ v gs =10v, t c =100c i d 2.4* pulsed drain current @ v gs =10v (note 1) i dm 16* avalanche current (note 1) i as 2 a single pulse avalanche energy (note 2) e as 16 repetitive avalanche energy (note 1) e ar 4.8 mj maximum temperature for soldering @ lead at 0.125 in(0.318mm) from case for 10 seconds t l 300 c w total power dissipation (t c =25 ) linear derating factor p d 48 0.38 w/ c operating junction and storage temperature tj, tstg -55~+150 c *drain current limited by maximum junction temperature * 100% uis testing in condition of v dd =50v, l=8mh, v g =10v, i l =2a, rated v ds =650v note : 1 . repetitive rating; pulse width limited by maximum junction temperature. 2 . i as =2a, v dd =50v, l=8mh, v g =10v, starting t j =+25 . thermal data parameter symbol value unit thermal resistance, junction-to-case, max r jc 2.6 thermal resistance, junction-to-ambient, max (note 1) 50 thermal resistance, junction-to-ambient, max (note 2) r ja 110 c/w 1. when the device is mounted on 1 in 2 fr-4 board with 2 oz. copper, in a still air environment with t a =25 c. 2. when the device is mounted on the mini mum pad size recommended (pcb mount) with t a =25 c.
cystech electronics corp. spec. no. : c080i3 issued date : 2016.07.19 revised date : page no. : 3/10 MTN4N65CI3 cystek product specification characteristics (t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 650 - - v v gs =0v, i d =250 a, tj=25 ? bv dss / ? tj - 0.6 - v/ c reference to 25c, i d =250 a v gs(th) 2.0 - 4.0 v v ds = v gs , i d =250 a *g fs - 5 - s v ds =15v, i d =2a i gss - - 100 na v gs = 30v - - 1 v ds =650v, v gs =0v i dss - - 10 a v ds =520v, v gs =0v, tj=125 c *r ds(on) - 1.8 2.6 v gs =10v, i d =2a dynamic *qg - 16 - *qgs - 3.1 - *qgd - 5.5 - nc i d =4a, v dd =520v, v gs =10v *t d(on) - 11 - *tr - 8.6 - *t d(off) - 35.4 - *t f - 31.6 - ns v dd =325v, i d =4a, v gs =10v, r g =25 ciss - 621 - coss - 61 - crss - 39 - pf v gs =0v, v ds =25v, f=1mhz source-drain diode *i s - - 4 *i sm - - 16 a *v sd - - 1.5 v i s =2a, v gs =0v *trr - 343 - ns *qrr - 1.59 - c v gs =0v, i f =4a, di f /dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2%
cystech electronics corp. spec. no. : c080i3 issued date : 2016.07.19 revised date : page no. : 4/10 MTN4N65CI3 cystek product specification typical characteristics typical output characteristics 0 2 4 6 8 10 0 5 10 15 20 25 30 35 40 45 50 v ds , drain-source voltage(v) i d , drain current(a) v gs =4.5v 10v,9v,8v,7v,6v v gs =5v v gs =4v brekdown voltage vs ambient temperature 0.6 0.7 0.8 0.9 1 1.1 1.2 -75 -50 -25 0 25 50 75 100 125 150 175 t a , ambient temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 0 1 2 3 4 5 0.001 0.01 0.1 1 10 i d , drain current(a) rds(on) , static drain-source on-state resistance() v gs =10v drain current vs gate-source voltage 0 2 4 6 8 10 024681 v gs , gate-source voltage(v) id , drain current(a) 0 t c =25c v ds =10v v ds =30v static drain-source on-state resistance vs gate-source voltage 0 1 2 3 4 5 6 7 8 024681 0 forward drain current vs source-drain voltage 0.001 0.01 0.1 1 10 00.20.40.60.811.2 v sd , source drain voltage(v) i f , forward current(a) vgs=0v tj=25c tj=150c ta=25c v gs , gate-source voltage(v) r ds(on) , static drain-source on-state resistance() i d =2a
cystech electronics corp. spec. no. : c080i3 issued date : 2016.07.19 revised date : page no. : 5/10 MTN4N65CI3 cystek product specification typical characteristics(cont.) capacitance vs reverse voltage 10 100 1000 0 5 10 15 20 25 30 v ds , drain-to-source voltage(v) capacitance-(pf) ciss coss crss f=1mhz static drain-source on-resistance vs ambient temperature 0.0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 -75 -50 -25 0 25 50 75 100 125 150 175 t a , ambient temperature(c) r ds(on) , normalized static drain-source on-state resistance i d =2a, v gs =10v r dson @tj=25c : 2 typ. maximum safe operating area 0.01 0.1 1 10 100 1 10 100 1000 v ds , drain-source voltage(v) i d , drain current(a) r ds( on) limited dc 10ms 100ms 1ms 100 s 10 s t c =25c, tj=150c, v gs =10v, r jc =2.6c/w, single pulse gate charge characteristics 0 2 4 6 8 10 0 4 8 121620 qg, total gate charge(nc) v gs , gate-source voltage(v) i d =4a v ds =130v v ds =325v v ds =520v maximum drain current vs case temperature 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 25 50 75 100 125 150 175 t c , case temperature(c) i d , maximum drain current(a) v gs =10v, r jc =2.6c/w threshold voltage vs junction tempearture 0.2 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a i d =1ma
cystech electronics corp. spec. no. : c080i3 issued date : 2016.07.19 revised date : page no. : 6/10 MTN4N65CI3 cystek product specification typical characteristics(cont.) single pulse power rating, junction to case 0 500 1000 1500 2000 2500 3000 3500 0.00001 0.0001 0.001 0.01 0.1 1 10 pulse width(s) power (w) t j(max) =150c t c =25c r jc =2.6c/w forward transfer admittance vs drain current 0.01 0.1 1 10 0.001 0.01 0.1 1 10 i d , drain current(a) g fs , forward transfer admittance(s) ta=25c pulsed v ds =15v transient thermal response curves 0.001 0.01 0.1 1 1.e-05 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r jc (t)=r(t)*r jc 2.duty factor, d=t 1 /t 2 3.t jm -t c =p dm *r jc (t) 4.r jc =2.6c/w
cystech electronics corp. spec. no. : c080i3 issued date : 2016.07.19 revised date : page no. : 7/10 MTN4N65CI3 cystek product specification test circuits and waveforms
cystech electronics corp. spec. no. : c080i3 issued date : 2016.07.19 revised date : page no. : 8/10 MTN4N65CI3 cystek product specification test circuits and waveforms(cont.)
cystech electronics corp. spec. no. : c080i3 issued date : 2016.07.19 revised date : page no. : 9/10 MTN4N65CI3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 5 +1/-1 seconds 260 +0/-5 c recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the p ackage, measured on the package body surface.
cystech electronics corp. spec. no. : c080i3 issued date : 2016.07.19 revised date : page no. : 10/10 MTN4N65CI3 cystek product specification to-251 dimension inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.2500 0.2618 6.35 6.65 i 0.0866 0.0945 2.20 2.40 b 0.2047 0.2126 5.20 5.40 j 0.2126 0.2244 5.40 5.70 c 0.5709 0.5866 14.50 14.90 k 0.2992 0.3071 7.60 7.80 d 0.0276 0.0354 0.70 0.90 l 0.0453 0.0492 1.15 1.25 e 0.0199 0.0276 0.50 0.70 m 0.0169 0.0228 0.43 0.58 f 0.0886 0.0925 2.25 2.35 n 0.1181 ref 3.00 ref g 0.0886 0.0925 2.25 2.35 s 0.1969 ref 5.00 ref h 0.0169 0.0228 0.43 0.58 t 0.1496 ref 3.80 ref notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0 important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . marking: cys 4n65c product style: pin 1.gate 2.drain 3.source 4drain 3-lead to-251 plastic package cystek packa g e code: i3 n ame date code 1 2 3 4


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