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tsm9117-TSM9120 page 1 ? 2014 silicon laboratories, inc. all rights reserved. features ? second-source for max9117-max9120 ? guaranteed to operate down to +1.6v ? ultra-low supply current 350na - tsm9119/TSM9120 600na - tsm9117/tsm9118 ? internal 1.252v 1.75% reference ? input voltage range extends 200mv outside-the-rails ? no phase reversal for overdriven inputs ? push-pull and open-drain output versions available ? crowbar-current-free switching ? internal hysteresis for clean switching ? 5-pin sc70 and 8-pin soic packaging applications 2-cell battery monitoring/management medical instruments threshold detectors/discriminators sensing at ground or supply line ultra-low-power systems mobile communications telemetry and remote systems description the tsm9117?TSM9120 family of nanopower comparators is electrically and form-factor identical to the max9117-max9120 family of analog comparators. ideally suit ed for all 2-cell battery- management/monitoring applications, these 5-pin sc70 analog comparators guarantee +1.6v operation, draw very li ttle supply current, and have robust input stages that can tolerate input voltages beyond the power supply. the tsm9117 and the tsm9118 draw 600na of supply current and include an on-board 1.252v 1.75% reference. the comparator-only tsm9119 and the TSM9120 draw a supply current of 350na. the tsm9117 and tsm9119?s push-pull output drivers were designed to drive 5ma loads from one supply rail to the other supply rail. the tsm9118 and the TSM9120?s open-drain output stages make it easy to incorporate these comparators into systems that operate on different supply voltages. 1.6v nanopower comparators with/without internal references typical application circuit part internal reference output type supply current (na) tsm9117 yes push-pull 600 tsm9118 yes open-drain 600 tsm9119 no push-pull 350 TSM9120 no open-drain 350
tsm9117-TSM9120 page 2 tsm9117/20 rev. 1.0 absolute maximum ratings supply voltage (v cc to v ee ) ............................................ +6v voltage inputs (in+, in-, ref) .... (v ee - 0.3v) to (v cc + 0.3v) output voltage tsm9117/911 9 ........................ (v ee - 0.3v) to (v cc + 0.3v) tsm9118/912 0 ...................................... (v ee - 0.3v) to +6v current into input pins ................................................ 20ma output curr ent ............................................................ 50ma output short-circuit duration ............................................ 10s continuous power dissipation (t a = +70c) 5-pin sc70 (derate 2.5mw/ c above +70c) ........ 200mw 8-pin soic (derate 5.88mw/c above +70c) ...... 471mw operating temper ature range ...................... - 40c to +85c junction temper ature ................................................ +150c storage temperature rang e ....................... -65c to +150c lead temperature (sol dering, 10s ) ............................... +300 electrical and thermal stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the op erational sections of the specifications is not implied. ex posure to any absolute maximum rating conditions for extended periods may affect device reliability and lifetime. package/ordering information order number part marking carrier quantity order number part marking carrier quantity tsm9117exk+ taa tape & reel ----- tsm9117esa+ ts9117e tube 97 tsm9117exk+t tape & reel 3000 tsm9118exk+ tab tape & reel ----- tsm9117esa+t tape & reel 2500 tsm9118exk+t tape & reel 3000 tsm9119exk+ tac tape & reel ----- TSM9120esa+ ts9120e tube 97 tsm9119exk+t tape & reel 3000 TSM9120exk+ tad tape & reel ----- TSM9120esa+t tape & reel 2500 TSM9120exk+t tape & reel 3000 lead-free program: silicon labs supplies only lead-free packaging. consult silicon labs for produ cts specified with wider oper ating temperature ranges.
tsm9117-TSM9120 tsm9117/20 rev. 1.0 page 3 electrical characteristics: tsm9117 & tsm9118 v cc = +5v, v ee = 0v, v in+ = v ref , t a = -40c to +85c, unless otherwise noted. typical values are at t a = +25c. see note 1. parameter symbol conditions min typ max units supply voltage range v cc inferred from the psrr test t a = +25c 1.6 5.5 v t a = t min to t max 1.8 5.5 supply current i cc v cc = 1.6v t a = +25c 0.6 1 a v cc = 5v t a = +25c 0.68 1.30 t a = t min to t max 1.60 in+ voltage range v in+ inferred from the output swing test v ee - 0.2 v cc + 0.2 v input offset voltage v os (note 2) t a = +25c 1 5 mv t a = t min to t max 10 input-referred hysteresis v hb (note 3) 4 mv input bias current i b t a = +25c 0.15 1 na t a = t min to t max 2 power-supply rejection ratio psrr v cc = 1.6v to 5.5v, t a = +25c 0.1 1 mv/v v cc = 1.8v to 5.5v, t a = t min to t max 1 mv/v output-voltage swing high v cc - v oh tsm9117, v cc = 5v, i source = 5ma t a = +25c 190 400 mv t a = t min to t max 500 tsm9117, i source = 1ma v cc = 1.6v, t a = +25c 100 200 v cc = 1.8v, t a = t min to t max 300 output-voltage swing low v ol v cc = 5v, i sink = 5ma t a = +25c 190 400 mv t a = t min to t max 500 i sink = 1ma v cc = 1.6v, t a = +25c 100 200 v cc = 1.8v, t a = t min to t max 300 output leakage current i leak tsm9118 only, v o = 5.5v 0.002 1 a output short-circuit current i sc sourcing, v o = v ee v cc = 5v 35 ma v cc = 1.6v 3 sinking, v o = v cc v cc = 5v 35 v cc = 1.6v 3 high-to-low propagation delay (note 4) t pd - v cc = 1.6v 16 s v cc = 5v 14 low-to-high propagation delay (note 4) t pd+ tsm9117 only v cc = 1.6v 15 s v cc = 5v 40 tsm9118 only v cc = 1.6v, r pullup = 100k ? 16 v cc = 5v, r pullup = 100k ? 45 rise time t rise tsm9117 only, c l = 15pf 1.6 s fall time t fall c l = 15pf 0.2 s power-up time t on 1.2 ms reference voltage v ref t a = +25c 1.230 1.252 1.274 v t a = t min to t max 1.196 1.308 reference voltage temperature coefficient tcv ref 100 ppm/c reference output voltage noise e n bw = 10hz to 100khz 1.1 mv rms bw = 10hz to 100khz, c ref = 1nf 0.2 reference line regulation ? v ref / ? v cc v cc = 1.6v to 5.5v 0.25 mv/v reference load regulation ? v ref / ? i out ? i out = 10na 1 mv/na
tsm9117-TSM9120 page 4 tsm9117/20 rev. 1.0 electrical characteristics: tsm9119 & TSM9120 v cc = +5v, v ee = 0v, v cm = 0v, t a = -40c to +85c, unless otherwise noted. typical values are at t a = +25c. see note 1. parameter symbol conditions min typ max units supply voltage range v cc inferred from the psrr test t a = +25c 1.6 5.5 v t a = t min to t max 1.8 5.5 supply current i cc v cc = 1.6v t a = +25c 0.35 0.80 a v cc = 5v t a = +25c 0.45 0.80 t a = t min to t max 1.20 input common-mode voltage range v cm inferred from the cmrr test v ee - 0.2 v cc + 0.2 v input offset voltage v os -0.2v v cm (v cc +0.2v) (note 2) t a = +25c 1 5 mv t a = t min to t max 10 input-referred hysteresis v hb -0.2v v cm (v cc +0.2v) (note 3) 4 mv input bias current i b t a = +25c 0.15 1 na t a = t min to t max 2 input offset current i os 75 pa power-supply rejection ratio psrr v cc = 1.6v to 5.5v, t a = +25c 0.1 1 mv/v v cc = 1.8v to 5.5v, t a = t min to t max 1 mv/v common-mode rejection ratio cmrr (v ee - 0.2v) v cm (v cc + 0.2v) 0.5 3 mv/v output-voltage swing high v cc - v oh tsm9119 only, v cc = 5v, i source = 5ma t a = +25c 190 400 mv t a = t min to t max 500 tsm9119 only, i source = 1ma v cc = 1.6v, t a = +25c 100 200 v cc = 1.8v, t a = t min to t max 300 output-voltage swing low v ol v cc = 5v, i sink = 5ma t a = +25c 190 400 mv t a = t min to t max 500 i sink = 1ma v cc = 1.6v, t a = +25c 100 200 v cc = 1.8v, t a = t min to t max 300 output leakage current i leak TSM9120 only, v o = 5.5v 0.001 1 a output short-circuit current i sc sourcing, v o = v ee v cc = 5v 35 ma v cc = 1.6v 3 sinking, v o = v cc v cc = 5v 35 v cc = 1.6v 3 high-to-low propagation delay (note 4) t pd - v cc = 1.6v 16 s v cc = 5v 14 low-to-high propagation delay (note 4) t pd+ tsm9119 only v cc = 1.6v 15 s v cc = 5v 40 TSM9120 only v cc = 1.6v, r pullup = 100k ? 16 v cc = 5v, r pullup = 100k ? 45 rise time t rise tsm9119 only, c l = 15pf 1.6 s fall time t fall c l = 15pf 0.2 s power-up time t on 1.2 ms note 1: all specifications are 100% tested at t a = +25c. specification lim its over temperature (t a = t min to t max ) are guaranteed by design, not production tested. note 2: v os is defined as the center of the hysteresis band at the input. note 3: the hysteresis-related trip points are defi ned by the edges of the hysteresis band, meas ured with respect to the center of the hysteresis band (i.e., v os ) (see figure 2). note 4: specified with an input overdrive (v overdrive ) of 100mv, and load capacitance of c l = 15pf. v overdrive is defined above and beyond the offset voltage and hysteresis of the comparator input. for the tsm9117/tsm9118, reference voltage error should also be added.
tsm9117-TSM9120 tsm9117/20 rev. 1.0 page 5 tsm9119/9120 supply current vs output transition frequency tsm9117/9118 supply current vs output transition frequency tsm9117/9118 supply current vs temperature tsm9119/9120 supply current vs temperature tsm9119/9120 supply current vs supply voltage and temperature tsm9117/9118 supply current vs supply voltage and temperature supply curent - a supply voltage - volt supply curent - a supply voltage - volt supply current - a output transition frequency - hz temperature - c supply curent - a v cc =+1.8v output transition frequency- hz t a = +25c t a = +85c t a = -40c 0.45 0.65 0.75 1.05 1.25 1 0.8 0.6 0.2 2.5 4.5 1.5 5.5 v cc =+5v v cc =+3v v cc =+1.8v v cc =+5v v cc =+3v v cc =+1.8v v cc =+5v v cc =+3v v cc =+1.8v v cc =+5v v cc =+3v supply curent - a t a = +25c t a = +85c t a = -40c temperature - c supply current - a typical performance characteristics v cc = +5v; v ee = 0v; c l = 15pf; v overdrive = 100mv; t a = +25 c, unless otherwise noted. -40 -15 10 35 85 60 -40 -15 10 35 85 60 0.55 0.85 1.15 0.95 3.5 0.4 0.7 0.9 0.5 0.6 0.8 1 0.4 0.7 1.1 0.9 1 0.8 0.6 0.4 0.5 0.7 0.9 5 10 20 30 0 15 35 25 5 10 20 30 0 15 35 25 1 10 100 10k 1k 1 10 100 10k 1k 2.5 4.5 1.5 5.5 3.5 0.5 0.3 0.2 0.3
tsm9117-TSM9120 page 6 tsm9117/20 rev. 1.0 output voltage low vs. sink current v ol - mv sink current- ma output voltage low vs. sink current and tem p erature short-circuit sink current vs temperature sink current- ma source current- ma v cc ? v oh - v source current- ma source current- ma 0 100 400 500 600 700 -40 -15 10 35 85 40 30 20 0 10 -40 -15 35 60 85 10 4 8 0 10 t a = +25c t a = +85c t a = -40c v cc =+1.8v v cc =+5v v cc =+3v v ol - mv sink current- ma v cc =+1.8v v cc =+5v v cc =+3v t a = +25c t a = +85c t a = -40c tsm9117/9119 output voltage high vs source current tsm9117/9119 output voltage high vs source current and temperature v cc ? v oh - v v cc =+1.8v v cc =+5v v cc =+3v v cc =+1.8v v cc =+5v v cc =+3v temperature - c temperature - c tsm9117/9119 short-circuit source current vs temperature t a = +25c 200 300 0 100 400 500 600 200 300 6 2 4 8 0 10 6 2 4 8 0 10 6 2 4 8 0 10 6 2 0 0.1 0.4 0.5 0.6 0.7 0.2 0.3 0 0.1 0.4 0.5 0.6 0.2 0.3 35 25 15 5 60 50 40 30 0 20 45 35 25 15 5 10 typical performance characteristics v cc = +5v; v ee = 0v; c l = 15pf; v overdrive = 100mv; t a = +25 c, unless otherwise noted.
tsm9117-TSM9120 tsm9117/20 rev. 1.0 page 7 tsm9117/9118 reference voltage vs supply voltage tsm9117/9118 reference voltage vs temperature offset voltage vs temperature hysteresis voltage vs temperature supply voltage - volt 2 2.2 2.4 2.6 2.8 6 5 4 3 2 4 6 8 10 v os - mv v cc =+1.8v v cc =+5v v cc =+3v temperature - c temperature - c v hb - mv v cc =+1.8v v cc =+5v v cc =+3v temperature - c reference voltage - v reference voltage - v source current- na v cc =+1.8v v cc =+3v, 5v sink current- na v cc =+1.8v v cc =+3v, 5v tsm9117/9118 reference voltage vs reference sink current tsm9117/9118 reference voltage vs reference source current reference voltage - v reference voltage - v 1.254 1.249 1.260 1.252 1.246 1.240 1.253 1.252 typical performance characteristics v cc = +5v; v ee = 0v; c l = 15pf; v overdrive = 100mv; t a = +25 c, unless otherwise noted. 0 2 4 6 8 10 0 1.250 1.254 1.256 1.258 1.248 1.244 1.242 1.260 1.252 1.246 1.240 1.250 1.254 1.256 1.258 1.248 1.244 1.242 -40 -15 10 35 85 60 -40 -15 10 35 85 60 1.260 1.252 1.246 1.240 1.250 1.254 1.256 1.258 1.248 1.244 1.242 1.251 1.250 -40 -15 10 35 85 60 4.5 5.5 3.5 2.5 4.5 1.5 5.5 3.5
tsm9117-TSM9120 page 8 tsm9117/20 rev. 1.0 tsm9117/9119 propagation delay (t pd+ ) vs input overdrive 6 8 10 12 14 16 40 20 0 60 40 20 0 0.01 0.1 10 100 1000 1 0 10 20 30 40 10 30 40 50 20 v cc =+1.8v v cc =+5v v cc =+3v v cc =+1.8v v cc =+5v v cc =+3v v cc =+1.8v v cc =+5v v cc =+3v v cc =+1.8v v cc =+5v v cc =+3v v cc =+1.8v v cc =+5v v cc =+3v v cc =+1.8v v cc =+5v v cc =+3v temperature - c capacitive load - nf input overdrive - mv input overdrive - mv temperature - c capacitive load - nf t pd- - s t pd- - s t pd- - s t pd+ - s t pd+ - s t pd+ - s propagation delay (t pd- ) vs temperature propagation delay (t pd- ) vs capacitive load propagation delay (t pd- ) vs input overdrive tsm9117/9119 propagation delay (t pd+ ) vs capacitive load typical performance characteristics v cc = +5v; v ee = 0v; c l = 15pf; v overdrive = 100mv; t a = +25 c, unless otherwise noted. -40 -15 10 35 85 60 -40 -15 10 35 85 60 tsm9117/9119 propagation delay (t pd+ ) vs temperature 60 50 30 10 18 20 22 24 26 28 0.01 0.1 10 100 1000 1 80 100 120 140 160 180 200 60 40 20 0 80 100 120 140 160 180 50 40 30 20 10 50 60 70 80 30 20 10 40 50 60 70 0 0 0
tsm9117-TSM9120 tsm9117/20 rev. 1.0 page 9 20s/div 20s/div 20s/div 20s/div r pullup - k ? r pullup - k ? propagation delay (t pd- ) at v cc = +3v propagation delay (t pd- ) at v cc = +5v tsm9118/9120 propagation delay (t pd+ ) vs pullup resistance tsm9118/9120 propagation delay (t pd- ) vs pullup resistance tsm9117/9119 propagation delay (t pd+ ) at v cc = +3v 9 11 12 13 14 200 140 80 0 10 100 1k 100k 100 1k 10 10k v cc =+1.8v v cc =+5v v cc =+3v t pd- - s t pd+ - s tsm9117/9119 propagation delay (t pd+ ) at v cc = +5v v cc =+1.8v v cc =+5v v cc =+3v input output input output input output input output 160 40 15 10 8 7 6 typical performance characteristics v cc = +5v; v ee = 0v; c l = 15pf; v overdrive = 100mv; t a = +25 c, unless otherwise noted. 180 100 120 60 20
tsm9117-TSM9120 page 10 tsm9117/20 rev. 1.0 power-up/power-down transient response propagation delay (t pd- ) at v cc = +1.8v tsm9117/9119 propagation delay (t pd+ ) at v cc = +1.8v input output input output 20s/div 20s/div input output input output 20s/div 200s/div tsm9117/9119 10khz transient response at v cc = +1.8v tsm9117/9119 1khz transient response at v cc = +5v input output 0.2s/div typical performance characteristics v cc = +5v; v ee = 0v; c l = 15pf; v overdrive = 100mv; t a = +25 c, unless otherwise noted.
tsm9117-TSM9120 tsm9117/20 rev. 1.0 page 11 pin functions tsm9117/tsm9118 tsm9119/TSM9120 name function sc70 so sc70 so 1 6 1 6 out comparator output 2 4 2 4 vee negative supply voltage 3 3 3 3 in+ comparator noninverting input 4 2 ? ? ref 1.252v reference output and comparator inverting input 5 7 5 7 vcc positive supply voltage ? ? 4 2 in- comparator inverting input ? 1, 5, 8 ? 1, 5, 8 nc no conn ection. not internally connected. block diagrams description of operation guaranteed to operate from +1.6v supplies, the tsm9117 and the tsm9118 comparators only draw 600na supply current, feature a robust input stage that can tolerate input voltages 200mv beyond the power supply rails, and include an on-board +1.252v 1.75% voltage reference. the comparator-only tsm9119 and the TSM9120 have the same attributes and only draw a supply current of 350na. to insure clean output switching behavior, all four analog comparators feature 4mv internal hysteresis. the tsm9117 and the tsm9119?s push-pull output drivers were designed to mi nimize supply-current surges while driving 5ma loads with rail-to-rail output swings. the o pen-drain output stage tsm9118 and TSM9120 can be connected to supply voltages above v cc to an absolute maximum of 6v above v ee . where wired-or logic connections are needed, their open-drain output stages make it easy to use these analog comparators. input stage circuitry the robust design of the analog comparators? input stage can accommodate any differential input voltage from v ee - 0.2v to v cc + 0.2v. input bias currents are typically 0.15na so long as the applied input voltage remains between the supply rails. esd protection diodes - connected internally to the supply rails - protect comparator inputs against overvoltage conditions. however, if the applied input voltage exceeds either or both supply rails, an increase in input current can occur when these esd protection diodes start to conduct.
tsm9117-TSM9120 page 12 tsm9117/20 rev. 1.0 output stage circuitry many conventional analog comparators can draw orders of magnitude higher supply current when switching. because of this behavior, additional power supply bypass capacitance may be required to provide additional charge storage during switching. the design of the tsm9117?TSM9120?s rail-to-rail output stage implements a technique that virtually eliminates supp ly-current surges when output transitions occur. as shown on page 5 of the typical operating characteri stics, the s upply-current change as a function of output transition frequency exhibited by this analog comparator family is very small. material benefits of this attribute to battery- power applications is the in crease in operating time and in reducing the size of power-supply filter capacitors. tsm9117/9118?s internal +1.252v v ref the tsm9117 and the tsm9118?s internal +1.252v voltage reference exhibits a typical temperature coefficient of 100ppm/c over the full -40c to +85c temperature range. an equivalent circuit for the reference section is illust rated in figure 1. since the output impedance of the voltage reference is 200k ? , its output can be bypassed with a low- leakage capacitor and is stable with any capacitive load. an external buffer ? such as the ts1001 ? can be used to buffer the voltage reference output for higher output current drive or to reduce reference output impedance. applications information low-voltage, low-power operation designed specifically for low-power applications, the tsm9117?TSM9120 comparators are an excellent choice. under nominal conditions, approximate operating times for this analog comparator family is illustrated in table 1 for a number of battery types and their charge capacities. internal hysteresis as a result of circuit noise or unintended parasitic feedback, many analog compar ators often break into oscillation within their li near region of operation especially when the applied differential input voltage approaches 0v (zero volt). externally-introduced hysteresis is a well-established technique to stabilizing analog comparator behavior and requires external components. as shown in figure 2, adding comparator hysteresis creates two trip points: v thr (for the rising input voltage) and v thf (for the falling input voltage). the hysteresis band (v hb ) is defined as the voltage difference between the two trip points. when a comparator?s input voltages are equal, hysteresis effectively forces one comparator input to move quickly past the other input, moving the input figure 1 : tsm9117 & tsm9118 internal v ref output equivalent circuit table 1: battery applications using the tsm9117- TSM9120 battery type rechargeable v fresh (v) v end-of-life (v) capacity, aa size (ma-h) tsm9117/tsm9118 operating time (hrs) tsm9119/TSM9120 operating time (hrs) alkaline (2 cells) no 3.0 1.8 2000 2.5 x 10 6 5 x 10 6 nickel-cadmium (2 cells) yes 2.4 1.8 750 937,500 1.875 x 10 6 lithium-ion (1 cell) yes 3.5 2.7 1000 1.25 x 10 6 2.5 x 10 6 nickel-metal- hydride (2 cells) yes 2.4 1.8 1000 1.25 x 10 6 2.5 x 10 6
tsm9117-TSM9120 tsm9117/20 rev. 1.0 page 13 out of the region where osc illation occurs. figure 2 illustrates the case in which an in- input is a fixed voltage and an in+ is varied. if the input signals were reversed, the figure would be the same with an inverted output. to save co st and external pcb area, an internal 4mv hysteresis circuit was added to the tsm9117?TSM9120. adding hysteresis to the tsm9117/tsm9119 the tsm9117/tsm9119 exhibit an internal hysteresis band (v hysb ) of 4mv. additional hysteresis can be generated with three external resistors using positive feedback as shown in figure 3. unfortunately, this method also reduces the hysteresis response time. use the following procedure to calculate resistor values. 1) setting r2. as the leakage current at the in pin is less than 2na, the current through r2 should be at least 0.2 a to minimize offset voltage errors caused by the input leakage current. the current through r2 at the trip point is (v ref - v out )/r2. in solving for r2, there are two formulas ? one each for the two possible output states: r2 = v ref /i r2 or r2 = (v cc - v ref )/i r2 from the results of the two formulae, the smaller of the two result ing resistor values is chosen. for example, when using the tsm9117 (v ref = 1.252v) at a v cc = 3.3v and if i r2 = 0.2 a is chosen, then the formulae above produce two resistor values: 6.26m ? and 10.24m ? - the 6.2m ? standard value for r2 is selected. 2) next, the desired hysteresis band (v hysb ) is set. in this example, v hysb is set to 100mv. 3) resistor r1 is calculated according to the following equation: r1 = r2 x (v hysb /v cc ) and substituting the values selected in 1) and 2) above yields: r1 = 6.2m ? x (100mv/3.3v) = 187.88k ? . the 187k ? standard value for r1 is chosen. 4) the trip point for v in rising (v thr ) is chosen such that v thr > v ref x (r1 + r2)/r2 (v thf is the trip point for v in falling). this is the threshold voltage at which the comparator switches its output from low to high as v in rises above the trip point. in this example, v thr is set to 3v. 5) with the v thr from step 4 above, resistor r3 is then computed as follows: r3 = 1/[v thr /(v ref x r1) - (1/r1) - (1/r2)] r3 = 1/[3v/(1.252v x 187k ? ) - (1/187k ? ) - (1/6.2m ? )] = 136.9k? in this example, a 137k ? , 1% standard value resistor is selected for r3. 6) the last step is to verify the trip voltages and hysteresis band using the standard resistance values: for vin rising: v thr = v ref x r1 [(1/r1) + (1/r2) + (1/r3)] = 3v and, for v in falling: v thf = v thr - (r1 x v cc /r2) = 2.9v ` figure 3 : using three resistors introduces additional hysteresis in the tsm9117 & tsm9119. figure 2 : tsm9117-TSM9120 threshold hysteresis band
tsm9117-TSM9120 page 14 tsm9117/20 rev. 1.0 and hysteresis band = v thr ? v thf = 100mv adding hysteresis to the tsm9118/TSM9120 the tsm9118/TSM9120 have a 4mv internal hysteresis band. both products have open-drain outputs and require an external pullup resistor to v cc as shown in figure 4. ad ditional hysteresis can be generated using positive feedback; however, the formulae differ slightly from those of the tsm9117/tsm9119. the procedure to calculate the resistor values for the tsm9118/TSM9120 is as follows: 1) as in the previous section, resistor r2 is chosen according to the formulae: r2 = v ref /0.2a or r2 = (v cc - v ref )/0.2 a - r4 where the smaller of the two resulting resistor values is the best starting value. 2) as before, the desired hysteresis band (v hysb ) is set to 100mv. 3) next, resistor r1 is then computed according to the following equation: r1 = (r2 + r4) x (v hysb /v cc ) 4) the trip point for v in rising (v thr ) is chosen (again, remember that v thf is the trip point for v in falling). this is the threshold voltage at which the comparator switches its output from low to high as v in rises above the trip point. 5) with the v thr from step 4 above, resistor r3 is computed as follows: r3 = 1/[v thr /(v ref x r1) - (1/r1) - (1/r2)] 6) as before, the last st ep is to verify the trip voltages and hysteresis band with the standard resistor values used in the circuit: for v in rising: v thr = v ref x r1 x (1/r1+1/r2+1/r3) and, for v in falling: v thf = v ref x r1 x [1/r1+1/r3+1/(r2+r4)] -[r1/(r2+r4)] x v cc and hysteresis band is given by v thr - v thf pc board layout and power-supply bypassing while power-supply bypass capacitors are not typically required, it is good engineering practice to use 0.1f bypass capacitors close to the device?s power supply pins when the power supply impedance is high, the power supply leads are long, or there is excessive noise on the power supply traces. to reduce stray capacitance, it is also good engineering practice to make signal trace lengths as short as possible. also recommended are a ground plane and surface mount resistors and capacitors. figure 4 : using four resistors introduces additional hysteresis in the tsm9118 & TSM9120.
tsm9117-TSM9120 tsm9117/20 rev. 1.0 page 15 a zero-crossing detector to configure a zero-crossing detector using a tsm9119 is illustrated in figure 5. in this example, the tsm9119?s inverting input is connected to ground and its noninverting input is connected to a 100mv p-p signal source. the tsm9119?s output changes state as the signal at the noninverting input crosses 0v. a logic-level translator logic-level translation between two different voltage systems is easy using the TSM9120 as shown in figure 6. this application circ uit converts 5v logic to 3v logic levels. in this case, the TSM9120 is powered by a +5v system and the external pullup resistor for the TSM9120?s open-drain output is connected to a +3v system. this configuration allows the full 5v logic swing without creating overvoltage on the 3v logic inputs. for 3v to 5v logic-level translations, simply interchange the +3v supply voltage connection on the comparator?s v cc and the +5v supply voltage to the external pullup resistor. figure 5 : a simple zero-crossing detector figure 6 : a 5v-to-3v logic level translator
tsm9117-TSM9120 page 16 tsm9117/20 rev. 1.0 package outline drawing 5-pin sc70 package outline drawing (n.b., drawings are not to scale)
tsm9117-TSM9120 silicon laboratories, inc. page 17 400 west cesar chavez, austin, tx 78701 tsm9117/20 rev. 1.0 +1 (512) 416-8500 ? www.silabs.com package outline drawing 8-pin soic package outline drawing (n.b., drawings are not to scale) patent notice silicon labs invests in research and development to help our custom ers differentiate in the market with innovative low-power, s mall size, analog-intensive mixed-signal solutions. s ilicon labs' extensive patent portfolio is a testament to our unique approach and wor ld-class engineering team. the information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. silicon laboratories assumes no responsibility for errors and om issions, and disclaims responsib ility for any consequences resu lting from the use of information included herein. additionally, silicon laborat ories assumes no responsibility for the functioning of undescr ibed features or parameters. silicon laboratories reserves the right to make c hanges without further notice. silicon laboratories makes no warra nty, representation or guarantee regarding the suitability of its pr oducts for any particular purpose, nor does silicon laboratories assume any liability arising out of the application or use of any product or circ uit, and specifically disclaims any and all liability, in cluding without limitation consequential or incidental damages. silicon laboratories products are not designed, intended, or authorized for use in applica tions intended to support or sustain life, or for any other application in wh ich the failure of the silicon laboratories product could create a situation where personal injury or death may occur. should buyer purchase or use silicon laboratories products for any such unintended or unaut horized application, buyer shall indemnify and hold silicon laboratories harmless against all claims and damages. silicon laboratories and silicon labs are tr ademarks of silicon laboratories inc. other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders.
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