advanced power n-channel enhancement mode electronics corp. power mosfet simple drive requirement bv dss 75v so-8 compatible with heatsink r ds(on) 7.5m low on-resistance i d 65a rohs compliant & halogen-free description absolute maximum ratings@t j =25 o c(unless otherwise specified) symbol units v ds v v gs v i d @t c =25 a i d @t a =25 a i d @t a =70 a i dm a p d @t c =25 w p d @t a =25 w e as single pulse avalanche energy 4 mj t stg t j symbol value units rthj-c maximum thermal resistance, junction-case 2.0 /w rthj-a maximum thermal resistance, junction-ambient 3 25 /w data & specifications subject to change without not ice ap94t07gmt-hf 5 halogen-free product 65 pulsed drain current 1 200 parameter rating drain-source voltage 75 thermal data parameter gate-source voltage + 20 drain current, v gs @ 10v 3 18.4 drain current (chip), v gs @ 10v drain current, v gs @ 10v 3 14.7 201501063 total power dissipation 62.5 1 storage temperature range operating junction temperature range -55 to 150 -55 to 150 total power dissipation 28.8 g d s s s s g pmpak ? 5x6 d d d d ap94t07 series are from advanced power innovated design and silicon process technology to achieve the lowest possible o n- resistance and fast switching performance. it provides the designer with an extreme efficient device for use in a wide range of power applications. the pmpak ? 5x6 package is special for dc-dc converters application and the foot print is compatible with so-8 with b ackside heat sink and lower profile.
electrical characteristics@t j =25 o c(unless otherwise specified) symbol parameter test conditions min. typ. max. units bv dss drain-source breakdown voltage v gs =0v, i d =250ua 75 - - v r ds(on) static drain-source on-resistance 2 v gs =10v, i d =30a - - 7.5 m v gs(th) gate threshold voltage v ds =v gs , i d =250ua 2 - 5 v g fs forward transconductance v ds =10v, i d =30a - 55 - s i dss drain-source leakage current v ds =60v, v gs =0v - - 25 ua i gss gate-source leakage v gs =+ 20v, v ds =0v - - + 100 na q g total gate charge i d =30a - 54 86 nc q gs gate-source charge v ds =40v - 14.5 - nc q gd gate-drain ("miller") charge v gs =10v - 25 - nc t d(on) turn-on delay time v ds =40v - 16 - ns t r rise time i d =1a - 14 - ns t d(off) turn-off delay time r g =3.3 ,v gs =10v - 40 - ns t f fall time r d =40 - 37 - ns c iss input capacitance v gs =0v - 2350 3760 pf c oss output capacitance v ds =25v - 390 - pf c rss reverse transfer capacitance f=1.0mhz - 245 - pf r g gate resistance f=1.0mhz - 1.3 - source-drain diode symbol parameter test conditions min. typ. max. units v sd forward on voltage 2 i s =30a, v gs =0v - - 1.3 v t rr reverse recovery time i s =10a, v gs =0 v , - 46 - ns q rr reverse recovery charge di/dt=100a/s - 86 - nc notes: 1.pulse width limited by max. junction temperature 2.pulse test 3.surface mounted on 1 in 2 copper pad of fr4 board, t < 10sec, 60 o c/w at steady state. 4.starting t j =25 o c , v dd =30v , l=0.1mh , r g =25 , i as =24a. this product is sensitive to electrostatic discharg e, please handle with caution. use of this product as a critical component in life support or other similar systems is not authorized . apec does not assume any liability arising out of t he application or use of any product or circuit des cribed herein; neither does it convey any license under it s patent rights, nor the rights of others. apec reserves the right to make changes without fur ther notice to any products herein to improve reliability, function or design. ap94t07gmt-hf 2
ap94t07gmt-hf fig 1. typical output characteristics fig 2. typical output characteristics fig 3. normalized bv dss v.s. junction fig 4. normalized on-re sistance temperature v.s. junction temperature fig 5. forward characteristic of fig 6. gate threshold voltage v.s. reverse diode junction temperature 3 0 20 40 60 80 100 0 4 8 12 16 v ds , drain-to-source voltage (v) i d , drain current (a) t c =150 o c 10v 9.0v 8.0v 7.0v v g =6.0v 0 50 100 150 200 250 0 4 8 12 16 20 v ds , drain-to-source voltage (v) i d , drain current (a) t c =25 o c 10v 9.0v 8.0v 7.0v v g = 6.0v 0.4 0.8 1.2 1.6 2.0 -50 0 50 100 150 t j , junction temperature ( o c) normalized r ds(on) i d =30a v g =10v 0 10 20 30 40 0 0.2 0.4 0.6 0.8 1 1.2 1.4 v sd , source-to-drain voltage (v) i s (a) t j =25 o c t j =150 o c 0.0 0.4 0.8 1.2 1.6 -50 0 50 100 150 t j , junction temperature ( o c) normalized v gs(th) 0.8 0.9 1 1.1 1.2 -50 0 50 100 150 t j , junction temperature ( o c) normalized bv dss
ap94t07gmt-hf fig 7. gate charge characteristics fig 8. typical capacitance characterist ics fig 9. maximum safe operating area fig 10. effective transient thermal impedance fig 11. switching time waveform fig 12. gate charge waveform 4 0 1 10 100 1000 0.01 0.1 1 10 100 1000 v ds ,drain-to-source voltage (v) i d (a) t c =25 o c single pulse 100us 1ms 10ms 100ms dc 0.001 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 1 10 t , pulse width (s) normalized thermal response (r thjc ) p dm duty factor = t/t peak t j = pdm x r thjc + t c t t 0.02 0.01 0.05 0.1 0.2 duty factor = 0.5 single pulse 0 2 4 6 8 10 12 0 20 40 60 80 q g , total gate charge (nc) v gs , gate to source voltage (v) i d =30a v ds =40v 0 400 800 1200 1600 2000 2400 2800 3200 1 5 9 13 17 21 25 29 v ds ,drain-to-source voltage (v) c (pf) f=1.0mhz c iss c oss c rss q v g 10v q gs q gd q g charge t d(on) t r t d(off) t f v ds v gs 10% 90% operation in this area limited by r ds(on)
ap94t07gmt-hf marking information 5 date code (ywwsss) y last digit of the year ww week sss sequence package code : mt part number meet rohs requirement for low voltage mosfet only 94t07gmt ywwsss
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