View BD8325FVT-M_9095641.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

structure silicon monolithic integrated circuit this product has no designed protection against radioactive ray s. 1/ 30 tsz02201-0q3q0aj83250-1-2 2013.11.22 rev.002 ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 14 ? 001 isolated dc/dc controller ic built-in secondary-side driver with synchronous rectification active clamp pwm controller BD8325FVT-M general description BD8325FVT-M is a pwm controller intended for active clamp, current-mode isolated switching regulator. this controller provides control outputs for driving primary-side mosfet, and outputs with adjustable delay, which can be used for driving synchronous rectifier mosfet on the secondary-side. its maximum input voltage is 20v. external startup regulator can be set at high voltage. applications high efficiency/ large current isolated dc/dc (vinmax=100v) cellular base station industrial power supplies car application 10w to 700w smps package w(typ) x d(typ) x h(max) tssop-b30 10.00mm x 7. 60mm x 1.00mm features ideal for active clamp /rest forward/flyback converter current-mode control with dual m ode over-current protection synchronization to external clock programmable dead-time (turn-on/turn-off) between main and aux mosfet by external resistor have control outputs for driving primary side mosfet ; have outputs with adjustable time for driving synchronous rectifier mosfet in secondary side (out2f, out2r pin) programmable oscillator frequency and maximum duty cycle by external resistor programmable soft-start time by externa l capacitor programmable slope compensation by external resistor a variety of protection first over-current protection (pulse- by -pulse mode) second over-current protection (hiccup mode) vcc_uvlo (input under-voltage protection) line_uvlo (line under-voltag e protection) typical application circuits c s l i n e u v v r e f s s f b c l k o u t s y n c g n d w a k e u p r e g e r r o r a m p v l i n e v o u t v c c / v d d a u x o u t o u t 2 f o u t 2 r p g n d r t o n r t o f f r d e l o n r d e l o f f r d e l s l f r d e l s l r 1 r d e l s l r 2 s a w h r e g fig.1 typical application circuit downloaded from: http:///
2/ 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 12 3 4 5 3029 28 27 26 67 8 9 1011 12 13 14 15 2524 23 22 21 20 19 18 17 16 gnd cs2 cs1 lineuv vref ss/sd rslp rdelon rdeloff2 rton rtoff rdelslf rdeloff1 rdelslr fb clkout sawh sync vcc n.c. aux n.c. out n.c. out2f n.c. out2r n.c. pgnd vdd pin configuration pin description no symbol description no symbol description 1 gnd gnd pin 16 pgnd pwr gnd 2 cs2 hiccup mode ocp detecting pin 17 n.c n.c 3 cs1 current feedback & pulse- by -pulse ocp detecting pin 18 out2r gate control pin for driving freewheel nmos in secondary side 4 lineuv uvlo detecting pin 19 n.c n.c 5 fb feedback voltage input pin 20 out2f gate control pin for driving forward nmos in secondary side 6 vref 5v regulator output pin 21 n.c n.c 7 ss/sd soft-start time set pin 22 out gate control pin for driving main pwm nmos in primary side 8 rslp slope compensation ramp set pin 23 n.c n.c 9 rdelon out rise/fall timing set pin 24 aux gate control pin for driving active-clamp pmos in primary side 10 rdeloff2 aux fall timing set pin 25 n.c n.c 11 rton switching frequency and on time set pin 26 vdd power pin of fet driver 12 rtoff switching frequency and off time set pin 27 vcc power pin of ic controller block 13 rdelslf out2f rise/fall timing set pin 28 sync synchronization signal input pin 14 rdeloff1 aux rise timing set pin 29 sawh triangular wave amplitude set pin 15 rdelslr out2r rise timing set pin 30 clkout clk output pin fig.2 pin configuration (top view) (top view) downloaded from: http:///
3/ 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 r t o n s s / s d c l o c k e n d s y n c g n d s t a r t s q r qb s l p r s l p s o f t s t a r t & s o f t s t o p x r e s e t r r fb v r e f l i n e u v v r e f 1 . 2 v pgnd pgnd t u r n o n / o f f d e l a y pgnd r d e l s l r r d e l s l f r d e l o f f 1 r d e l o n r t o f f i r e f pgnd p w m s i g n a l v c c v d d out a u x o u t 2 r o u t 2 f c s 2 c s 1 p g n d v r e f c l k o u t tsd l i n e u v v c c _ u v l o s s / s d p w m o f f s e t i s l p i n t e r n a l _ r e g c u r r e n t s o u r s e v c c u v l o l i n e u v l o v r e f u v l o s a w 15ua 15ua 5ua s a w h 0 . 5 v r d e l o f f 2 v r e f 0 . 4 8 v 1 . 2 v o c p 2 o c p 2 0 . 4 6 v d u t y 0 c l k o u t v r e f _ u v l o c l k o u t o c p 1 block diagram fig.3 block diagram downloaded from: http:///
4/ 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 description of blocks internal power supply this is a regulator for powering the internal circuits via vcc. there i s no direct output pin from this block. ldo block this is the 5v regulator that can provide the power supply for start up block. it should be bypassed by 0.1uf~0.47uf for stability. the circuit is utilized for the pull-up power suppl y of fb pin and the power supply for sawosc, clk and ss/sd block. uvlo function is built-in (4.5v typ). once uvlo signal is detecte d, out, aux, out2f and out2r pins turn l, and the capacitor connected to ss/sd pin is also discharged instant aneously. the short current between vref and gnd is 12ma (typ). uvlo block this is uvlo detection circuit of vcc , line and ld o. the ic starts up and shuts down based on the sequence on timing chart. when line uvlo signal is reset, 5ua current flows through lineuv pin whil e when line uvlo is detected, the current is 0ua. it is possible to adjust the hys value through the external resistor. moreover, vcc and vrefs uvlo comparators have built-in minimum of 2us noise filters for a voiding error detection. timing set block for simplicity of application, the adjustable function can be achieved through external resistor: ? switching timing of out, aux, out2f and out2r pin resistors connected from rdelon, rdeloff1, rdeloff2, rdelslf, rdelslr pin (1.6v typ) to ground ? oscillator frequency and max duty resistors connected from rton and rtoff pin (1.6v typ) to ground ? slope compensation amplitude resistor connected from rslp pin (maximum value of sawtooth wave : 2.5v (typ)) to ground there is a built-in open detection function such that when it i s activated, the outputs are terminated. this is to avoid the pin opening caused by the incorrect mounting of external resistor . synchronization clk transmitter when multiple ics will be use, the synchronization function is implemented s o that the frequency remains synchronous. the master ic provides clkout signal to the slave ic through sync pin, a nd in turn, the slave ic and master ic s frequency can be synchronized. the transmitter includes the i/o pa rt of clk and sync pin. by means of extracting the frequency (at the rising edge) only, the maxduty can be set. there is h-side and l-side resistors connected to clkout pin with a value of 0. 6k. sawosc block the circuit is used for generating clock, duty and slope signal . in the stand-alone operation (external synchronization inactivated) the voltage of sawh pin, which determines the amplitu de of internal triangular wave, is 2.65v (typ). during the external synchronization operation, the internal circui ts control the sawh voltage to synchronize with the external clock. lvp circuit is applied to sawh pin, and the detection and res et voltage are 1.35v (typ) and 2.6v (typ). as soon as sawh lvp signal is detected, out, aux, out2f and out2r turn l and ss/sd is d ischarged instantaneously, and sawh is pre-charged (10k). feedback block the voltage of ss/sd from block is compared with fb voltage; the lower voltage enters the pwm sign al generator. cs1 , cs2 control block this is the block intended for ocp detection. when cs1 exceeds 0.48v, ocp1 signal is produced and reset flag of latc h circuit ( ) is activated. in addition, out=l, aux=l, out2f=l, out2r=h and the power transfer from input to output is terminated momentarily. when the clk enters into next cycle, the power transfer starts again. as the new cycle starts, the low-side nmos switch connected to cs1 pin is on when clkout=h in order to make sure that the reset signal i s removed . with the series of action, pulse- by -pulse mode ocp protection is observed as shown in the exa mple application design. when cs2 voltage exceeds 1.2v (typ), ocp2 signal is detected, the ic ente rs into soft_stop mode and ss/sd pin starts to be discharged with 15ua current. as cs2 voltage drops t o 1.2v (typ) and ss/sd Q 0.5v, the ic returns to soft_start mode and starts up. like cs1, the low side nmos switch co nnected to cs2 is on when clkout=h. as shown in the example application design, if the output is sh orted to ground, then the soft_start mode and soft_stop mode alternate, the chips hiccup ocp protection operates. downloaded from: http:///
5/ 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 pwm signal generator through the comparator, cs1 related signal is compared with the lowe r voltage of ss/sd and fb pin, and reset signal for latch circuit ( ) is produced. to be precise, the cs1 level +0.5v and the lower of ss/sd a nd fb levels 1/5 are compared and the output pulse is entered into latch circuit. in addition, when fb is lowered and ss/sd drops to 2.3v (typ), duty0 signal turns h and reset signal continues outputting, swi tching is terminated and duty is turned to 0%. once the switching restarts, duty0 will not turn h unless the volt age drops to the hysteresis voltage, 2.225v (typ). reset condition generator according to the outputs from each protection circuit, the blo ck controls the signal as shown below: (1) ss/sd 15ua charge, 15ua discharge, instantaneous discharge (2) pwm signal out, aux, out2f, out2r off ss charge/discharge controller according to whether the protection operation is detected, the ope ration is shown as (1) ( 3) (1) 15ua charge (soft_start) condition: when vcc uvlo, vref uvlo, line uvlo, tsd, cs2, sawh lvp and external r-open protections are not detected. ss /sd is clamped to vref5v level. (2) 15ua discharge (soft_stop) condition: when line , tsd and cs2 protections are detected. once detected, the signal is latched. the ic will not restore to soft st art mode unless ss/sd is 0.5v. (3) instantaneous dischar ge (discharge resistor r=0.5k) condition: when vcc uvlo, vref uvlo, sawh lvp and r-open protection are detected. pwm signal latch block the reference pulse signal of each output pulse is generated b y sr-flipflop. set: internal clock signal reset: pwm output signal or ocp1 signal or clkout signal (max duty) turn-on delay/turn-off delay time generator according to the dead-times, which are set by the external resis tor on out, aux, out2f and out2r pin in block , dead -times are applied to pwm signal ( ). predriver the level of vref5v is shifted to vdd level. powmos this is the drivers output stage for driving external mosfet. it i s constituted by nmos and pmos and the power supply is vdd (absolute maximum rating is 20v ). downloaded from: http:///
6/ 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 absolute maximum ratings pa rameter symbol limit unit input voltage v vcc v vdd 20 v out , aux voltage v out v aux -0.3 20 v out, aux output peak current i outh, i auxh 2.5 a i outl i auxl 2.5 out2f , out2r voltage v out v aux -0.3 20 v out2f, out2r output peak current i out2fh i out2rh 1 a i out2fl, i out2rl 1 pin voltage 1 v pin1 -0.3 7 v pin voltage 2 v pin2 -0.3 20 v power dissipation pd 1 400 *3 m operating temperature topr - 40 105 storage temperature tstg - 55 150 junction temperature tjmax 150 *1 vpin1 applicable pin rdelon, rdeloff1, rdeloff2, rdelslf, rdelslr, rton, rtoff, rslp, vref, clkout, sawh, fb, ss/sd, cs1, cs2, sync, lineuv. *2 vpin2 applicable pin vcc, vdd, out, aux, out2f, out2r *3 rohm standard board (see below) derate by 11.2mw /c when operating over 25 c operating ratings parameter symbol min typ max unit input voltage v vcc v vdd 8 18 v power supply bypass capacitor c vcc 4.7 f oscillator frequency set resistor (f=250khz 66.6% duty) r ton 36 120 750 k r toff 36 120 750 k delay time set resistor r del 20 120 750 k rslp resistor r slp 43 62 150 k frequency range f osc 50 500 khz vref phase compensation capacitor c ref 0.1 0.47 f sawh output capacitor c sawh 0.1 1 .5 f lineuv voltage v lineuv 5.5 v 2 1 downloaded from: http:///
7/ 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 electrical characteristics parameter test condition symbol min typ max unit overall icc before start up v cc 8/ 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 electrical characteristics parameter test condition symbol min typ max unit current sense duty0 reset threshold voltage fb sweep up v duty0a 0.083 vref 0.092 vref 0.101 vref v duty0 detection threshold voltage fb sweep down v duty0b 0.08 vref 0.089 vref 0.098 vref v cs1 level shift voltage v lvl 0.09 vref 0.1 vref 0.110 vref v current limit voltage (1) cycle- by -cycle v cs1 0.087 vref 0.096 vref 0.105 vref v current limit voltage (2) hiccup mode v cs2 0.216 vref 0.24 vref 0.264 vref v output (for driving primary side fet applied to out, aux pin ) h-side on resistance i out = -200ma ,vdd=10v r msoh 1 1.5 l-side on resistance i out =+200ma ,vdd=10v r msol 1 1. 5 output (for driving secondary side fet applied to out2f out2r pin ) h-side on resistance i out = -100ma ,vdd=10v r sroh 1.6 2.90 l-side on resistance i out =+100ma ,vdd=10v r srol 1.50 2.70 output delay time delay time 1 ( ou t2r_off to out _on ) c load =1000pf, r g =3.6 r delon =120k t rdelon 87 1 75 263 ns delay time 2 (out2r_off to aux_off) c load =1000pf, r g =3.6 r deloff1 =120k t rdeloff1 17 35 53 ns delay time 3 (out_off to aux _on ) c load =1000pf, r g =3.6 r deloff2 =120k t rdeloff2 60 120 180 ns delay time 4 (out2r_off to out2f _on ) c load = 1000p f, r g =3.6 r delslf =120k t rd els lf 60 120 180 ns delay time 5 (out_off to out2r _on ) c load = 1000p f, r g =3.6 r delslr =120k t rd elslr 30 60 90 ns downloaded from: http:///
9/ 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 typical performance characteristics (reference data) 70 75 80 85 90 95 100 0 2 4 6 8 10 output current [a] efficiency [%] fig.4 efficiency-output current fig.5 i_vcc - vcc fig.6 i_vref - vref fig.7 vref - temp 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 9 11 13 15 17 19 i_vcc [ma] vcc[v] 0 1 2 3 4 5 6 0 5 10 15 20 vref [v] i_vref [ma] 4.5 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5 - 50 0 50 100 150 vref [v] temp [ c] fb= ss= 0v i_vref= 0ma downloaded from: http:///
10 / 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 fig.8 frequency - temp 225 230 235 240 245 250 255 260 265 270 275 - 50 0 50 100 150 frequency [khz] temp [ c] 225 230 235 240 245 250 255 260 265 270 275 - 50 0 50 100 150 frequency [khz] temp [ c] 0.10 1.00 10.00 100.00 10 100 1000 trton [us] rton [k ] 210 220 230 240 250 260 270 280 - 50 0 50 100 150 frequency [khz] temp [ c] 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 - 50 0 50 100 150 trton (us) temp [ c] 64 64.5 65 65.5 66 66.5 67 67.5 68 68.5 69 - 40 10 60 110 max duty [%] temp [ c] fig.9 max duty - temp rton= 120k rtoff= 120k rton= 120k rtoff= 120k rton= 120k rtoff= 120k fig.10 trton - rton fig.11 trton - temp downloaded from: http:///
11 / 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 0.10 1.00 10.00 10 100 1000 trtoff [us] rtoff [k ] 1 1.1 1.2 1.3 1.4 1.5 1.6 - 50 0 50 100 150 trtoff [us] temp [ c] 1 1.05 1.1 1.15 1.2 1.25 1.3 1.35 1.4 - 50 0 50 100 150 line uvlo threshold voltage [v] temp [ c] 4 4.2 4.4 4.6 4.8 5 5.2 5.4 5.6 5.8 6 - 50 0 50 100 150 lineuv current [ua] temp [ c] rton= 120k rtoff= 120k fig.12 trtoff - rtoff fig.14 lineuv threshold - temp fig.13 trtoff - rtoff fig.15 i_lineuv C vl ineuv v_lineuv= 1.3v downloaded from: http:///
12 / 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 0 10 20 30 40 50 60 70 2.0 2.5 3.0 3.5 4.0 fb voltage [v] out duty [%] 0.30 0.35 0.40 0.45 0.50 0.55 0.60 - 50 0 50 100 150 cs1(ocp) threshold voltage [v] temp [ c] 1.00 1.05 1.10 1.15 1.20 1.25 1.30 1.35 1.40 - 50 0 50 100 150 cs2(ocp) threshold voltage [v] temp [ c] 12.0 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 16.5 17.0 - 50 0 50 100 150 i_ss/sd[ua] temp [ ] fig.17 cs2 (ocp) threshold - temp fig.16 cs1 (ocp) threshold C temp fig.19 out duty - vfb fig.18 i_ss/sd C temp rton= 120k rtoff= 120k downloaded from: http:///
13 / 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 10 100 1000 10 100 1000 t_rdelon [ns] rdelon [k ] 100 120 140 160 180 200 220 240 - 50 0 50 100 150 t_rdelon [ns] temp [ c] 10 100 1000 10 100 1000 t_rdeloff1[ns] rdeloff1 [k ] 0 10 20 30 40 50 60 70 80 - 50 0 50 100 150 t_rdeloff1 [ns] temp [ c] fig.20 trdelon - rton fig.21 trdelon - temp fig.22 trdeloff1 C rtoff1 fig.23 trdeloff1 - temp rdeloff1=120k rdelon=120k downloaded from: http:///
14 / 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 10 100 1000 10 100 1000 t_rdeloff2 [ns] rdeloff2 [k ] 40 60 80 100 120 140 160 - 50 0 50 100 150 t_rdeloff2 [ns] temp [ c] 40 60 80 100 120 140 160 - 50 0 50 100 150 t_rdelslf [ns] temp [ c] 10 100 1000 10 100 1000 t_rdelslf[ns] rdelslf [k ] fig.24 trdeloff2 C rdeloff2 fig.25 trdeloff2 - temp fig.26 trdelslf - rdelslf fig.27 trdelslf - rdelslf rdeloff2=120k rdelslf=120k downloaded from: http:///
15 / 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 10 100 1000 10 100 1000 t_rdelslr[ns] rdelslr [k ] 0 10 20 30 40 50 60 70 80 - 40 10 60 110 t_rdelslr [ns] temp[ c] fig.28 trdelslr - rdelslr fig.29 trdelslr - rdelslr rdelslf=120k downloaded from: http:///
16 / 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 functional details and operation 1 the setting of startup regulator the external startup regulator is necessary in case of pow er supply above 18v. the output of startup regulator is assumed to be 10-12v and the min value should be above 9v. the maximum consumed current is 4ma. 2 handling of n.c . pin 17 , 19 , 21 , 23 , 25 pin are nc pins. as they include gnd, please dont connect them to any node, just make them in floating state. adjacent pin short protection is invalid. 3 output signal for driving nchfet / pchfet regarding nchfet driving signal (out), active-clamp pchfet driving signal (aux) in primary side and driving signal(out2f,out2r) in secondary side, the signals output resis tance is small and can be adjusted by external resistor s o that the driving signal can be applied to multiple con verter requirements. as expected, the spike noise becomes big when the external resistor is small. please use appropriate resistor to adj ust the slew rate. 4 range of external resistor connected to adjustable pin there are several adjustable pins connected by external re sistor. the resistors (rdelon , rdeloff1 , rdeloff2 , rdelslf , rdelslr) can set the switching frequency, duty (rton/rtoff), d ead -time of primary and secondary side as well as the dead-time between primary side and secondary s ide (p.2,3). set the above resistors in the range as shown in p.6. take note that if the resistance is out of range, the ic ma y break or weaken because of open detection. the estimat e d formulas of switching frequency and m ax duty are shown below: rton trton ? ? ? ? 12 10 22 . 22 rtoff trtoff ? ? ? ? 12 10 11 . 11 trtoff trton fosc ? ? 1 trtoff trton trton maxduty ? ? 5 protection function the protection functions of the ic are the following: ? vcc uvlo uvlo signal will reset when vcc=8.5v and will be detected when vcc=8v. there is a 2us (min) noise filter. ? vref uvlo once vccuvlo signal is removed, vref(5v) starts up. uvlo signal will reset when vref=4.6v (typ) and will be detected w hen vref=4.5v (typ). there is a 2us noise filter. ? line uvlo it is determined by the resistance voltage divide r between line and gnd. when uvlo signal has been reset, 5ua source current flows out. the current comb ined with external resistor determines the hysteresis. once lineuv signal is detected, th e ic enters into soft_stop mode and ss/sd pin starts to be discharged by 15ua current. if lineuv signal is reset and ss/sd Q 0.5v, the ic starts up in soft start mode. the absolute ma ximum rating of lineuv pin is 7v and its rating of operation is 5.5v. ? sawh_lvp when sawh < 1.35v (typ ), sawh_lvp signal is detected. the switching operation is stoppe d and ss/sd pin is discharged instantaneously. the external c apacitor connected to sawh pin begins to be charged quickly (several hundred ma). if the saw h becomes 2.6v (typ), sawh_lvp signal will reset and the quick discharge will s top, and ss/sd will start to be charged (soft start). ? tsd protects the ic from thermal runaway caused by the excessi ve rise of temperature. tsd (thermal shutdown) protection is activated when the chips internal temperature is 170 and the ic restarts when the temperature drops to 150 . like line uvlo, tsd will also make the ic into soft stop mode. in consideration of the power dissipati on during actual use, it is ne cessary to consider heat design with sufficient margin. app lication design should never make use of the thermal shutdown circuit. ? cs1, cs2 the ic has two ocp protection modes, pulse- by -pulse and hiccup. the cycle- by -cycle mode terminates the conduction cycle if cs1 voltage becomes 0.48v (typ). the off latch is reset and conduction is on when clkout =h l in the next cycle. if the voltage on cs2 pin exceeds 1.2v (typ), the ic enters hi ccup mode protection. while in the hiccup mode, the ic enters into soft start mode as well as lineuv. if the over load condition sustains, the ic will alternate between soft start mo de and soft stop mode. if hiccup mode will not be used, cs2 pin should be shorted to gnd pin . ? r_open when the pins of rton, rtoff, rdelon, rdeloff1, rdeloff2, rdelslf, rdelsl r, rslp are open, the protection is activated. out, aux, out2f, out2r stop switching instantaneously (l level) and the capacitor connected to ss/sd pin is discharged instantaneously. downloaded from: http:///
17 / 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 6 operation of ss/sd pin, vref. when power on when vccuvlo signal is reset, vref starts up and in turn, vref uvlo and sawh lvp signal will also reset. if line uvlo, ocp and tsd signals are n ot detected, the capacitor connected to ss/sd pin starts to be charged (15ua typ). the vol tage of ss/sd pin is clamped by vref. when power off when lineuv signal is detected, the cap acitor connected to ss/sd pin starts to be discharged (-15ua). if vcc uvlo signal is detected, vref is discharged naturally. besid es, the rise/fall time is determined by the formula t=cv/ichg (idischg) 7 soft stop mode in addition to the protection condition of #6, when line uv lo, tsd or cs2 signal is detected, the ic enters soft stop mode. during this mode, in consideration of external devic e and the heat caused by cs2 detection or tsd detection, out pin is off directly. however, aux, out2f and out2r pins continue switchi ng to avoid over-current and over-voltage to happen (refer to the timing chart). moreover, ss/sd pin is discha rged by 15ua current, and the duty of aux, out2f, out2r gradually decrease as ss/sd voltage decreases. when ss/sd vol tage drops to 2.215vtyp (duty0 is detected), aux, out2f and out2r will stop switching. if ss/sd voltage is dis charged to 0.5v and the other protections are not activated, then ss pin starts to be charged again and the output st arts up in soft start mode automatically. 8 pwm operation as shown in fig. 30 , slope signal is generated through clkout signal, which is generated from rton, rtoff and sawh voltage. the slope signal is buffered an d outputted to rslp pin. the current flowing through rslp pin is proportional to slope voltage, and in addition the current is amplified 5 times and outputt ed to cs1 pin. the slope current is overlapped with sensing current and converted to the vol tage on external resistor rs for the stability of the peak current mode control loop. the voltage signal is shifted up by 0.5v (cs1 level shift voltage) and transmitted to inp input of p wm comparator. however, the other input inn voltage is one fifth of fb_ss_l, w hich is the lower voltage within fb and ss pin. if two input signals are compared and the pwm latch bloc ks reset signal is outputted, then the pwm pulse width can be determined. if inn node voltage is above 0.46v (typ) during th e sweep up of fb_ss_l, duty0 turns h and pwm_latch_r turns constant h (duty=0%). moreover, duty0 turns h if th e inn node voltage drops to 0.445v (typ) during the sweep down of fb_ss_l. +- +- +- +- + +- +- forward converter current transformer line rslp ifb rslp rcs rf v=rcs ? ifb v=rs ? islope ( rs >> rf ) x5 current feedback cf cs1 vo isolated photocupla 5v fb slope slope saw clkout 2.5v sawh(= 2.65vtyp) 0.5v timing chart r r r 0.5v cs1+0.5v changed to current individually and then overlapped voltage feedback s s / s d 15 a 15 a soft start /soft stop the lower of fb and ss is buffered 4r r 0.46v/ 0.445v ocp(cs1 detection) inn inp or or pwm_comp_out clkout inp inn pwm_ comp_out 0.5v offset ss_fb_l 15 secondary side primary side secondary side primary side current feedback through current sense resistor rcs high frequency noise is reduced through filter rf/cf clkout islope duty0 soft start charge current soft down discharge current on duty off duty rs 5 times of slope current that flows through rslp is outputted to cs1 (to pwm signal latch block) timing chart slope compensation current is overlapped with feedback current at rcs fb_ss_l when fb_ss_l1/5 < 0.445v/0.46v, duty= 0% pwm comp duty0 comp or pwn signal is produced through pwm comp. max duty is determined by clkout. pwm_latch_r clkout fig. 30 Csimplified diagram of the pwm comparator proximity circuit downloaded from: http:///
18 / 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 9. synchronization function (1) outline when multiple ics will be used, the synchronization functio n is implemented so that the frequency for all ics will be the same. the master ic provides clkout signal to the slave ic through sync pin, a nd the slave ic and master ic s frequency now turn to be synchronized. the transmitter includes the i/o part of clk and sync pin. by means of extracting the frequency (at the rising edge) only, the max duty can be set. th ere are h side and l side resistors connected to clkout pin, and the value is 0.6k .when multiples ics will be used, the synchronization funct ion is implemented so that the frequency remains synchronous. when the synchronizatio n function operates, the master ic controls the slave ics and sets their max duty (rton, rtoff) and slope compensation (rslp). the fu nction operates when the master ic s clkout pin is connected to slave ics sync pin. synchronization function operates when clk signal exists on sync p in and returns to free running mode when clk signal disappears. it is recommend ed to determine whether synchronization is needed before startup . take note that connecting bigger capacitor to sawh pin will reduce the jitter bu t prolong the settling time of synchronization. moreover, the output may be unstable during capture course, pay attention to it when synchronization function switches or when operati on of ic suddenly stops. if the synchronization function is not needed, sync pin shoul d be connected to gnd and clkout pin should be left open. (2) operation setting frequency setting : please set the slave ics typi cal frequency within -3 +0 .5 % of master ics and the external resistor that programs the frequency should be the of 0.5% precision. (example ) master ic : rton=rtoff=120k (fosc= 250khz, max duty=66.6%) , and the max duty of slave ic is set at 62% khz trtoff trton khz 25 . 251 1 5. 245 ? ? ? 62 .0 ? ? ? trtoff trton trton maxduy thus, rton=113k ? rtoff=137khz (fosc P 248.0khz, maxduty P 62.3%) capacitor connected to sawh : 0.1u 1 .5 uf ceramic capacitor although connecting big capacitor can reduce the jitter, it take s long time to stabilize the synchronization course. fig. 31 connection example of external synchronization downloaded from: http:///
19 / 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 (3) principle of operation the rton (determine charge current) and rtoff (determine discharge curr ent) pins are used to generate saw triangular wave, thus the switching frequency and maxduty can be set. the rslp pin is used to set the slope compensation. saw *1 *1 variation of t on , t off is determined by rton rtoff t on t off maxduty is determined by the ratio between t on and t off the ratio between rton and rtoff slp *2 ( overlaped with cs) *2 variation of t on is determined by rton and rtslp the slope of slp is determined by rslp fosc in stand-alone mode is determinded by sawh voltage and the sum of t on and t off rton and rtoff sawh varies in external synchronization mode sawh( triangular wave top voltage ) sawl(bottom voltage ) P 0.5v the internal frequency fosc is compared with external frequency fs ync, and the difference is fed back. in this way, the synchronization like pll is observed. if fosc fsync (the internal frequency fosc is faster), the capacitor conne cted to sawh pin is charged through 100k, and the triangular wave top v oltage is leveled up. when fosc is slower, the capacitor is discharged so that fosc gets near to fsync. the capacitor con nected to sawh pin is used for smoothing the voltage variation when switching, in this way stable frequency can be outputted. operation chart of synchronization fosc fsync fosc is fast sawh gets higher (amplitude gets bigger) fosc fsync fosc is slow sawh gets lower (amplitude gets smaller) sawh (top level) decreases sawh( top level ) increases frequency increase frequency decreases more than 2 cycles of synchronization is intputted edge is not detected during 2 cycles power on external synchronization mode stand-alone mode fsync 20 / 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 design of pattern diagram (1) the switching voltages on the line of out, aux, out2f, o ut2r, sync, clkout, (sync) pin and the application boards switching line are the noise source. please avoid th e sensitive line of fb, lineuv, cs1, cs2, rslp, rdelon, rdeloff2, rton, rtoff, rdelslf, rdeloff1, rdelslr, ss, sawh and vref from bein g wired in parallel with noise source line. furthermore, place the external devic e near the sensitive pin and the gnd of external device should be connected to the low noise gnd. (2) for reducing the parasitic inductance of wire f ro m out, aux, out2f, out2r to fet gate line, it is better to make the wire as short as possible. also, as switching current occurs while driving the fet gate, the current l oop area should be made small. (3) vcc is the power supply for ic internal analog circuits a nd it should be immune to external noise. on the one ha nd, vdd is the power supply for the output driver and switching noise occurs when the driver works. therefore, vcc and vdd should not use the common input capacitor, but indivi dual input capacitor near their pins. additionally, the gnd of input capacitor connected to vcc pin should be connected to low noise gnd. likewise; the gnd pin of the ic also should be connected to low noise gnd. downloaded from: http:///
21 / 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 startup timing chart downloaded from: http:///
22 / 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 soft-stop and restart timing chart ss_sd out clk (internal signal) aux out2f out2r line line uvlo (lineuv < 1.2v) cs2 > 1.2v or (tsd is the same) if ss< 0.5v, lineuv > 1.2v and cs2 < 0.5v soft start begain cs2 soft_stop according to the slope of ss/sd, pwm duty gets shorter 2.225v when ss ?? 2.225v, aux,out2f,out2r stop switching (0.5v) 2.3v duty0 detection duty0 is reseted according to the slope of ss/sd, pwm duty gets longer soft_start if ss< 0.5v, lineuv > 1.2v and cs2 < 0.5v ,out2r= h? l downloaded from: http:///
23 / 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 adjustable timing through external resistor adjustable timing by external resistor t rdelon ??? m2r in secondary side turns off ? mmain in primary side turns on delay time ( t rdelon and t rdelon are linked t rdeloff2 ??? mmain in primary side turns off ? maux in primary side turns on delay time ? t rdelslf ??? m2r in secondary side turns off ? m2f in secondary side turns on delay time t rdelslf and t rdelslf are linked t rdeloff1 ??? m2r in secondary side turns off ? maux in primary side turns off delay time t rdelslr ??? mmain in primary side turns off ? m2r in secondary side turns on delay time t period ??? pwm frequency. time can be adjusted by rrton rrtoff out pwm signal (ic internal signal aux out2f out2r clkout fosc = 1 / ( t rton + t rtoff ) (nchfet: high=on) (pchfet: low=on) (nchfet: high=on) (nchfet: high=on) 175n 120n 35n 60n 120n 175n 120n 2666n 1333n 250khz typ. -1 t rton -2 t rtoff t rdelon t rdelon t rdeloff1 t rdeloff2 t rdelslf t rdelslf t rdelslr input line 48v output secondary side primary side controlled by out controlled by aux controlled by out2f controlled by out2r pch nch nch mmain nch m2f maux m2r ( ) ) ( ) ( ( ) * the times above are under the condition: rton=rtoff=rdelon=rdeloff1=rdeloff2=rdelslf=rdelslr=120k downloaded from: http:///
24 / 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 2.2u 1k 4.3 24 24 ceeh55s100b si7119dn 0.1u rjk1557dpa 0.1u 3.6 6.2 110 10u 0.47u 1 30 470p 3.3k 100p 1.5k 0.1u 1u 62k43k 100k 75k75k 47k 51k24k gndcs2 cs1 lineuvfb vref ss/sd clkout sawh sync vcc vdd aux out out2f out2r pgnd 15 16 10u sync clkout line_p gnd_pri +- rslp rdelon rdeloff2 rton rtoff rdeslf rdeloff1 rdelslr u1 vout gnd_sec (0) rf071m2s 2scr372p 10k 10k 68k 20 1u 1.5k lm317lipk 13k 2.2m 1u 10k 10k rb160 va-40 10k rf071m2s 43 43 0.1u 0.1u ee1101ee1101 ps2801-1 ba2904fvm tl432bidbzr 0.1u 0.1u tmain isolation secondary primary tfz 12b bd8325fvt vref rb160 va-40 3.9k 3.9k 2200p 91k 6.2k 47k 4.7k 1u 0.47u 2scr372p rf071m2s 1u tlz 10b 10k 18k 20k 0.1u 10k rjk0854dpb 10k 11 2200p 1000p rf071m2s 10u 10u 12u vin reg line input current sense primary driver controller power supply controller secondary driver secondary output feed back on_off 10k 100k rue002n02 low : active 10 470p 16svpf560m imz4 330 330 imz4 10 2.2uf 820p 110 1k 3.3k (0) rjk1557dpa 2scr372p 6.2 rf071m2s rf071m2s rf071m2s ( ) (0) rb160 va-40 (0) (0) rjk0854dpb 51k 30k 2.2u 2.2u 2.2u ty p i c a l ap p l i c a ti o n de s i g n a forward converter application design is shown in fig.31.in put voltage ranges from 36~ 70v, output current from 0~8a and output voltage is 12v. the turns-ratio of main transformer is 1.5:1. switching frequency is 31 0khz, max duty is 66.6% . regarding to over-current protection, cs1 and cs2 are all set to io P 9a. fig.34 application circuit downloaded from: http:///
25 / 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 po wer dis s i p a ti o n the thermal derating characteristic is shown below. it is necessary to design the system requirements and board lay out so that the junction temperature does not exceed 150 . in practical use, take into consideration that the temperature ri se may likely to occur because of the heat dissipation of different pcb layout and other heat source . < pcb board > fr4 (glass epoxy) substrate 114.3mm 76.2mm 1.6mmt copper foil surface ic land pattern + test leads 2,3 layer , back side copper foil 74.2mm 74.2mm 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 0 25 50 75 100 125 150 ambient temperature: ta( ) power dissipation : pd w) 1.4w downloaded from: http:///
26 / 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 i/o equivalent circuit pin no. pin name pin equivalent circuit 1 16 18 20 22 24 26 gnd pgnd out2r out2f out aux vdd 2 3 cs2 cs1 4 lineuv 5 fb 6 27 30 vref vcc clkout vcc fb vdd out aux out2f out2r pgnd gnd internal power supply 5.2v cs 1 cs 2 internal power supply 5.2v lineuv vcc vref clkout downloaded from: http:///
27 / 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 pin no. pin name pin equivalent circuit 7 ss/sd 8 rslp 9 10 11 12 13 14 15 rdelon rdeloff2 rton rtoff rdelslf rdeloff1 rdelslr 28 sawh 27 sync internal power supply 5.2v ss / sd vref rslp internal power supply 5.2v rdelon rdeloff1 rdeloff2 rdelslf rdelslr rton rtoff internal power supply 5.2v internal power supply 5.2v vref sawh vref sync downloaded from: http:///
28 / 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 operational notes 1) absolute maximum rating operating the ic over the absolute maximum ratings may damage the ic. in addition, it is impossible to predict all destructive situations such as short-circuit modes, op en circuit modes, etc. therefore, it is important to consider c ircuit protection measures, like adding a fuse, in case the ic is opera ted in a special mode exceeding the absolute maximum ratings. 2) power supply lines back emf due to the output coil may result to a return current into the ic. ca ution should be taken by putting capacitor between power supply and gnd as a pathway for the return curre nt. consider the effect of temperature and aging on the capacitance value when using electrolytic capacitors . if the connected power supply does not have sufficient current absorption capacity, the return current will cause the voltage on the power supply line to rise and may exceed the absolute maximum ratings. therefore, it is important to c onsider circuit protection measures such as adding a voltage clamp diode between the power supply and gnd pins. 3) gnd potential the potential of gnd pin must be the lowest potential of all pins of the ic at all operating conditions . ensure that no pins are at a potential below the ground pin at any t ime, even during transient condition. in particular, when the noise caused by the switching of out, aux, out2f and out2r is big , please insert serial resistor to reduce the slew rate. as the output resistance of the ic is small, please contact rohm for detailed information about the resistor to be inserted. 4) heat design use a thermal design that allows for a sufficient margin by taking into account the permissible power dissipation (pd) in actual operating conditions 5) pin shorting and incorrect mounting be careful when mounting the ic on printed circuit boards. the ic may be damaged if it is moun ted in a wrong orientation or if pins are shorted together . s hort circuit may be caused by conductive particles caught betwe en the pins. 6) operation in strong magnetic fields be mindful when operating in the presence of strong magnetic fields , as it may cause the ic to malfunction. 7) capacitor between vref and gnd the capacitor between vref and gnd should be above 0.1uf. for suppressing the noise and reducing the fluctuation on vref line, please set the capacitor to appropriate value. furth ermore, vref should not be open; otherwise the vref output will be unstable. 8) testing on application boards when testing the ic on an application board, connecting a capa citor directly to a low-impedance output pin may subject the ic to stress. always discharge capacitors completely after each process or step. the ics power supply should always be turned off completely before connecting or remo ving it from the test setup during the inspection process. t o prevent damage from electro static discharge, ground the ic du ring assembly and use similar precautions during transport and storage. 9) input pins this monolithic ic contains p+ isolation and p substrate l ayers between adjacent elements in order to keep them isolated. p-n junctions are formed at the intersection of the p layers with the n layers of other elements, creating a parasitic diode or transistor. for example (refer to figure below): when gnd > pin a and gnd > pin b, the p-n junction operates as a parasi tic diode. when gnd > pin b, the p-n junction operates as a parasitic transistor. parasitic diodes inevitably occur in the structure of the ic. the operation of parasitic diodes can result in mutua l interference among circuits, operational faults, or physic al damage. therefore, conditions that cause these diodes to operate, such as applying a voltage lower than the gnd v oltage to an input pin (and thus to the p substrate) should be avoided. resistor transistor (npn) n n n p + p + p p substrate gnd parasitic element pin a n n p + p + p p substrate gnd parasitic element pin b c b e n gnd pin a pin b other adjacent elements e b c gnd parasitic element parasitic element example of monolithic ic structure downloaded from: http:///
29 / 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 10) ground wiring pattern when using both small-signal and large-current gnd traces, the two ground traces should be routed separately but connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signa l ground caused by large currents. also ensure that the gnd trac es of external components do not cause variations on the gnd voltage. the power supply and ground lines must be as short and thick as possible to reduce line impedance. 11) thermal shutdown circuit the ic incorporates a built-in thermal shutdown circuit, whi ch is designed to turn off the ic when the internal temperature of the ic reaches a specified value. it is not des igned to protect the ic from damage or guarantee its operation. do not continue to operate the ic after this function is activated. do not use the ic in conditions where this function will always be activated. downloaded from: http:///
30 / 30 bd8325fvt ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0q3q0aj83250-1-2 tape quantity embossed carrier tape 2000pcs e2 (the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on t he right hand) direction of feed ordering part number b d 8 3 2 5 f v t - me 2 parts. no package packaging and forming specification e2: embossed tape and reel physical dimension ? tape and reel information tssop-b30 marking diagram tssop-b30 (top view) b d 8 3 2 5 f v t part number marking lot number 1pin mark datasheet d a t a s h e e t notice - ss rev.002 ? 2014 rohm co., ltd. all rights reserved. notice precaution on using rohm products 1. if you intend to use our products in devices requiring extremely high reliability (such as medical equipment (note 1) , aircraft/spacecraft, nuclear power controllers, etc.) and whos e malfunction or failure may cause loss of human life, bodily injury or serious damage to property (specific applications), please consult with the rohm sales representative in advance. unless otherwise agreed in writ ing by rohm in advance, rohm shall not be in any way responsible or liable for any damages, expenses or losses in curred by you or third parties arising from the use of any rohms products for specific applications. (note1) medical equipment classification of the specific applications japan usa eu china class class class b class class | class 2. rohm designs and manufactures its products subject to strict quality control system. however, semiconductor products can fail or malfunction at a certain rate. please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe desi gn against the physical injury, damage to any property, which a failure or malfunction of our products may cause. the following are examples of safety measures: [a] installation of protection circuits or other protective devices to improve system safety [b] installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. our products are not designed under any special or extr aordinary environments or conditi ons, as exemplified below. accordingly, rohm shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any rohms products under an y special or extraordinary environments or conditions. if you intend to use our products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] use of our products in any types of liquid, incl uding water, oils, chemicals, and organic solvents [b] use of our products outdoors or in places where the products are exposed to direct sunlight or dust [c] use of our products in places where the products ar e exposed to sea wind or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use of our products in places where the products are exposed to static electricity or electromagnetic waves [e] use of our products in proximity to heat-producing components, plastic cords, or other flammable items [f] sealing or coating our products with resin or other coating materials [g] use of our products without cleaning residue of flux (ev en if you use no-clean type fluxes, cleaning residue of flux is recommended); or washing our products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] use of the products in places subject to dew condensation 4. the products are not subjec t to radiation-proof design. 5. please verify and confirm characteristics of the final or mounted products in using the products. 6. in particular, if a transient load (a large amount of load applied in a short per iod of time, such as pulse. is applied, confirmation of performance characteristics after on-boar d mounting is strongly recomm ended. avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading c ondition may negatively affect product performance and reliability. 7. de-rate power dissipation (pd) depending on ambient temper ature (ta). when used in seal ed area, confirm the actual ambient temperature. 8. confirm that operation temperat ure is within the specified range described in the product specification. 9. rohm shall not be in any way responsible or liable for fa ilure induced under deviant condi tion from what is defined in this document. precaution for mounting / circuit board design 1. when a highly active halogenous (chlori ne, bromine, etc.) flux is used, the resi due of flux may negatively affect product performance and reliability. 2. in principle, the reflow soldering method must be used; if flow soldering met hod is preferred, please consult with the rohm representative in advance. for details, please refer to rohm mounting specification downloaded from: http:///
datasheet d a t a s h e e t notice - ss rev.002 ? 2014 rohm co., ltd. all rights reserved. precautions regarding application examples and external circuits 1. if change is made to the constant of an external circuit, pl ease allow a sufficient margin considering variations of the characteristics of the products and external components, including transient characteri stics, as well as static characteristics. 2. you agree that application notes, re ference designs, and associated data and in formation contained in this document are presented only as guidance for products use. theref ore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. precaution for electrostatic this product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. please take proper caution in your manufacturing process and storage so that voltage exceeding t he products maximum rating will not be applied to products. please take special care under dry condit ion (e.g. grounding of human body / equipment / solder iron, isolation from charged objects, se tting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1. product performance and soldered connections may deteriora te if the products are stor ed in the places where: [a] the products are exposed to sea winds or corros ive gases, including cl2, h2s, nh3, so2, and no2 [b] the temperature or humidity exceeds those recommended by rohm [c] the products are exposed to di rect sunshine or condensation [d] the products are exposed to high electrostatic 2. even under rohm recommended storage c ondition, solderability of products out of recommended storage time period may be degraded. it is strongly recommended to confirm sol derability before using products of which storage time is exceeding the recommended storage time period. 3. store / transport cartons in the co rrect direction, which is indicated on a carton with a symbol. otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. use products within the specified time after opening a humidity barrier bag. baking is required before using products of which storage time is exceeding the recommended storage time period. precaution for product label qr code printed on rohm products label is for rohms internal use only. precaution for disposition when disposing products please dispose them proper ly using an authorized industry waste company. precaution for foreign exchange and foreign trade act since our products might fall under cont rolled goods prescribed by the applicable foreign exchange and foreign trade act, please consult with rohm representative in case of export. precaution regarding intellectual property rights 1. all information and data including but not limited to application example contained in this document is for reference only. rohm does not warrant that foregoi ng information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. rohm shall not be in any way responsible or liable for infringement of any intellectual property rights or ot her damages arising from use of such information or data.: 2. no license, expressly or implied, is granted hereby under any intellectual property rights or other rights of rohm or any third parties with respect to the information contained in this document. other precaution 1. this document may not be reprinted or reproduced, in whol e or in part, without prior written consent of rohm. 2. the products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of rohm. 3. in no event shall you use in any wa y whatsoever the products and the related technical information contained in the products or this document for any military purposes, incl uding but not limited to, the development of mass-destruction weapons. 4. the proper names of companies or products described in this document are trademarks or registered trademarks of rohm, its affiliated companies or third parties. downloaded from: http:///
datasheet datasheet notice ? we rev.001 ? 2014 rohm co., ltd. all rights reserved. general precaution 1. before you use our pro ducts, you are requested to care fully read this document and fully understand its contents. rohm shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny rohms products against warning, caution or note contained in this document. 2. all information contained in this docume nt is current as of the issuing date and subj ec t to change without any prior notice. before purchasing or using rohms products, please confirm the la test information with a rohm sale s representative. 3. the information contained in this doc ument is provi ded on an as is basis and rohm does not warrant that all information contained in this document is accurate an d/or error-free. rohm shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. downloaded from: http:///

▲Up To Search▲

Price & Availability of BD8325FVT-M

	To Download BD8325FVT-M Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .