1 others n overview the DN8648FBP is an ic which incorporates a 32-bit shift register and a latch driver to meet high-speed operation low power consumption and high-density printout of the thermal printers for the work processors, and so on. it employs the bi- cmos process in which the serial-in and serial-out/parallel-out functions are incorporated, the 32-step shift register block and latch block are composed of cmos, and the 32-step parallel driver block is bipolar. n features serial-in and serial-out/parallel-out cascade connection allowed built-in output malfunctioning preventive circuit low current consumption at standby i cc 100? high-breakdown, large current drive type output steps breakdown voltage : 30v output current : 120ma (per pin) surface mountable 44-pin flat package (pin pitch : 0.8mm) n applications driving of the thermal heads driving of the relays, leds, solenoids, etc. DN8648FBP 32-bit shift register latch driver ic 111 33 23 12 22 34 44 0.35 0.1 0.8 unit : mm 10.0 0.3 2.85 0.2 1.3 0.1 1.3 0.1 0.2 0.6 + 0.1 ?0.05 12.2 0.3 0.1 0.1 10.0 0.3 12.2 0.3 44-pin quadflat package (qfh044-p-1010 ) 39 sout 34 v cc gnd 6, 7, 27, 28 31 33 32 37 en 36 stb 35 clk 38 sin d cp q l q d d cp q l q d d cp q ld 42 q 1 d cp q ld q 43 d cp q ld q q q 2 q 3 q 31 q 32 output malfunction protector n block diagram
2 others DN8648FBP v cc v o i o p d t opr t stg supply voltage output voltage output current power dissipation operating ambient temperature storage temperature v v ma w ?c ?c 0 to 7 0 to 30 120 (per one circuit) 1.8 * ?20 to + 75 ?55 to + 125 * when mounting onto the pcb, power dissipation is reduced at a rate of 15mw/?c from ta= 25?c. parameter symbol rating unit n absolute maximum ratings (ta = 25?c) operating supply voltage output voltage output current clock frequency input pulse width setup time hold time clk stb over 40ns over 40ns sin stb sin stb over 30ns over 40ns over 20ns over 0ns clock pulse rise time clock pulse fall time * 1 an allowable value changes depends on the number of simultaneously turned-on circuits and the duty. use with power dissipation taken into full account. * 2 input duty : 40 to 60% v cc v o i o f clk t w t su t h t r t f 4 to 6v below 30v below 100ma * 1 below 10mhz * 2 below 500ns below 500ns parameter symbol range n recommended operating range (ta=25?c) input voltage 0.7v cc v ih v cc v v cc = 4 to 6v 0 v il 0.3v cc v input current i ih 25 a v ih = 5v i il ?25 a v il = 0v i ol =100ma i ol = 80ma v o = 30v (output off) output saturation voltage (qn) v ce (sat) 1 0.4 v v ce (sat) 2 0.35 v output leakage current i olk1 50 a * v cc =5v unless otherwise specified i olk2 a v o =15v (output off) supply current i cc1 100 a total driver output off 25 i cc2 5ma driver output 1 circuit on output voltage (sout) v oh v i o = ? a v ol 0.1 v i o =1 a 4.9 output current (sout) i oh ma v oh = 4.5v i ol ma v ol = 0.4v ?4 4 output malfunctioning preventive circuit operating voltage 2.9 v cct + 3.9 v * 2.6 v cct 3.6 v * parameter symbol condition min typ max unit n electrical characteristics (ta=25?c)
3 others DN8648FBP off driver output v cct + v cct v cc enable enable * output malfunctioning preventive circuit operating voltage timing chart parameter symbol condition min typ max unit n switching characteristics (ta =25?c) maximum clock frequency 10 f max. mhz propagation delay time t plh 100 ns t phl 100 ns t plh 2 s v cc = 5v r l = 100 w c l = 15pf v cc = 5v c l = 15pf input clk clk clk output sout t phl 0.5 s t plh 2 s t phl 0.5 s qn en qn n supplementary descriptions 2.5v 2.5v 2.5v 2.5v 2.5v 2.5v 2.5v 2.5v 2.5v 10% 10% 90% 90% 1/f clk t wh (clk) t r (clk) t f (clk) t h (sin) t su (sin) t h (sin) t su (sin) t su (stb) t w (stb) t h (stb) t wl (clk) clk sin stb timing chart 1. input timing 2. propagation delay time 2.5v 2.5v 2.5v 2.5v 2.5v 2.5v 2.5v 2.5v 2.5v 2.5v t plh t plh t plh t phl t phl t phl clk en sout q 1 ~ q 32
4 others DN8648FBP input driver output sout clk - - - - en l l h h h h stb l h h h sin l h q l h h nc h l nc q n h h nc q n ?1 q n ?1 nc q' 31 nc q' 31 q' 31 q' 31 nc note) h = high level, l = low level, = either "h" or "l" will do, - = transition from "h" to "l", = transition from "h" to "l", nc = no change, q' 31 = status of the 31st shift register n supplementary descriptions (cont.) function table pin assignments v cc clk stb en sin sout nc nc q 32 q 31 q 30 q 10 q 11 q 12 q 13 q 14 q 15 q 16 q 17 q 18 q 19 q 20 34 35 36 37 38 39 40 41 42 43 44 DN8648FBP 22 21 20 19 18 17 16 15 14 13 12 33 32 31 30 29 28 27 26 25 24 23 q 1 q 2 q 3 q 4 q 5 gnd gnd q 6 q 7 q 8 q 9 1234567891011 q 29 q 28 q 27 q 26 q 25 gnd gnd q 24 q 23 q 22 q 21
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