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1 ? fn6744.0 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. fga is a trademark of intersil corporation. copyright intersil americas inc. 2008. all rights reserved all other trademarks mentioned are the property of their respective owners. isl21009mep high voltage input precision, low noise fga? voltage references the isl21009mep fga? voltage references are extremely low power, high precision, and low noise voltage references fabricated on intersil?s proprietary floating gate analog technology. the isl21009mep features very low noise (4.5v p-p for 0.1hz to 10hz), low operating current (180a, max), and 3ppm/c of temperature drift. in addition, the isl21009 family features guaranteed initial accuracy as low as 0.5mv. this combination of high initial accuracy, low power and low output noise performance of the isl21009mep enables versatile high performance control and data acquisition applications with low power consumption. device information the specifications for an enhanced product (ep) device are defined in a vendor item drawing (vid), which is controlled by the defense supply center in columbus (dscc). ?hot-links? to the applicable vid and other supporting application information are provided on our website. available options features ? specifications per dscc vid v62/08629 ? full mil-temp electrical perf ormance from -55c to +125c ? controlled baseline with one wafer fabrication site and one assembly/test site ? full homogeneous lot processing in wafer fab ? no combination of wafer fabrication lots in assembly ? full traceability through assembly and test by date/trace code assignment ? enhanced process change notification ? enhanced obsolescence management ? eliminates need for up-screening a cots component ? output voltages . . . . . . . . . . . . . . 2.500v, 4.096v, 5.000v ? initial accuracy . . . . . . . . . . . . . . . . . . . . .0.5mv, 1.0mv ? input voltage range. . . . . . . . . . . . . . . . . . . 3.5v to 16.5v ? output voltage noise . . . . . . . . .4.5v p-p (0.1hz to 10hz) ? supply current . . . . . . . . . . . . . . . . . . . . . . . .180a (max) ? temperature coefficient . . . . . . . . . . . . 3ppm/c, 5ppm/c ? output current capability. . . . . . . . . . . . . . . up to 7.0ma ? operating temperature range. . . . . . . . . -55c to +125c ? package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 ld soic applications ? defense/commercial avionics ? radar/sonar systems ? signal processing applications pinout isl21009mep (8 ld soic) top view part number v out option (v) initial accuracy (mv) tempco. (ppm/c) isl21009bmb825ep 2.500 0.5 3 isl21009cmb825ep 2.500 1.0 5 isl21009bmb841ep 4.096 0.5 3 isl21009bmb850ep 5.000 0.5 3 isl21009cmb850ep 5.000 1.0 5 gnd or nc v in dnc gnd 1 2 3 4 8 7 6 5 dnc dnc v out trim or nc data sheet december 15, 2008
2 fn6744.0 december 15, 2008 pin descriptions pin number pin name description 1 gnd or nc can be either ground or no connect 2v in power supply input connection 4 gnd ground connection 5 trim allows user trim typicall y 2.5%. leave unconnected when unused. 6v out voltage reference output connection 3, 7, 8 dnc do not connect; internal connection ? must be left floating ordering information part number (note 1) part marking v out option (v) grade temp. range (c) package pkg. dwg. # isl21009bmb825ep 21009bm 25ep 2.500 0.5mv, 3ppm/c -55 to +125 8 ld soic m8.15 isl21009cmb825ep 21009cm 25ep 2.500 1.0mv, 5ppm/c -55 to +125 8 ld soic m8.15 isl21009bmb841ep 21009bm 41ep 4.096 0.5mv, 3ppm/c -55 to +125 8 ld soic m8.15 isl21009bmb850ep 21009bm 50ep 5.000 0.5mv, 3ppm/c -55 to +125 8 ld soic m8.15 isl21009cmb850ep 21009cm 50ep 5.000 1.0mv, 5ppm/c -55 to +125 8 ld soic m8.15 note: 1. add ?-tk? suffix for tape and reel. please refer to tb347 for details on reel specifications. figure 1. typical application precision 12-bit sub-ranging dac c1 0.001f c1 10f low noise dac output isl21009-25ep gnd gnd nc nc nc nc v out v in 1 2 3 4 8 7 6 5 +5v x79000 sck a0 a1 a2 si so rdy up down oe cs clr v cc vh vl v ref v ss v out v buf v fb 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 spi bus isl21009mep
3 fn6744.0 december 15, 2008 typical performance curves (isl21009-25ep) (r ext = 100k ) figure 2. i in vs v in , 3 units figure 3. i in vs v in , 3 temperatures figure 4. line regulation figure 5. line regulation over-temperature figure 6. load regulation figure 7. v out vs temperature 0 20 40 60 80 100 120 140 3.5 5.5 7.5 9.5 11.5 13.5 15.5 v in (v) i in (a) unit 1 unit 2 unit 3 80 90 100 110 120 3.5 5.5 7.5 9.5 11.5 13.5 15.5 v in (v) i in (a) +25c +125c -40c 2.49980 2.49985 2.49990 2.49995 2.50000 2.50005 2.50010 3.50 5.50 7.50 9.50 11.5 13.5 15.5 v in (v) v out (v) (normalized to 2.50v at v in = 5v) unit 2 unit 3 unit 1 -200 -150 -100 -50 0 50 100 3.5 5.5 7.5 9.5 11.5 13.5 15.5 v in (v) v in = 5.5v v out (mv) normalized to +25c +125c -55c -0.15 -0.1 -0.05 0 0.05 0.1 -7 -5 -3 -1 1 sinking output current (ma) sourcing -55c +25c +125c 357 v in = 5.5v v out (mv) normalized to 2.4993 2.4994 2.4995 2.4996 2.4997 2.4998 2.4999 2.5000 2.5001 2.5002 -40 -20 0 20 40 60 80 100 120 140 temperature (c) v out (v) unit 3 unit 2 unit 1 isl21009mep
4 fn6744.0 december 15, 2008 figure 8. psrr at different capacitive loads figure 9. line transient response, no capacitive load figure 10. line transient response, 0.001f load capacitance figure 11. turn-on time figure 12. z out vs frequency figure 13. v out noise, 0.1hz to 10hz typical performance curves (isl21009-25ep) (r ext = 100k ) (continued) -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 1 10 100 1k 10k 100k 1m 10m frequency (hz) psrr (db) 500khz peak v in (dc) = 10v 10nf 1nf 100nf no load 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 time (ms) v in high i in medium i in low i in v in and v out (v) 0 20 40 60 80 100 120 140 160 1 10 100 1k 10k 100k 1m frequency (hz) z out ( ) 10nf 1nf no load 100nf 2mv/div gain is x1000, noise is 4.5v p-p isl21009mep
5 fn6744.0 december 15, 2008 figure 14. load transient response figure 15. load t ransient response typical performance curves (isl21009-25ep) (r ext = 100k ) (continued) -50a +50a no output capacitance 7ma -7ma no output capacitance typical performance curves (isl21009-41ep) (r ext = 100k ) figure 16. i in vs v in , 3 units figure 17. i in vs v in , 3 temperatures figure 18. line regulation, 3 units figure 19. line regulation over-temperature v in (v) i in (a) 57911131517 80 85 90 95 100 105 110 unit 1 unit 2 unit 3 v in (v) i in (a) 80 85 90 95 100 5 7 9 11 13 15 17 +25c +125c -40c 4.0958 4.0959 4.0959 4.0960 4.0960 4.0961 4.0961 4.0962 4.0962 4.0963 4.50 6.50 8.50 10.5 12.5 14.5 16.5 v in (v) v out (v) unit 3 unit 2 unit 1 normalized to 4.096v at v in = 5.0v -100 -50 0 50 100 150 200 4.5 6.5 8.5 10.5 12.5 14.5 16.5 v in (v) v in = 5.5v v out (mv) normalized to +25c +125c -55c isl21009mep
6 fn6744.0 december 15, 2008 figure 20. load regulation figure 21. v out vs temperature figure 22. psrr at different capacitive loads figure 23. line transien t response, no capacitive load figure 24. line transient response, 0.001 f load capacitance figure 25. turn-on time typical performance curves (isl21009-41ep) (r ext = 100k ) (continued) -0.2 -0.1 0.0 0.1 0.2 0.3 0.4 0.5 0.6 -7 -6 -5 -4 -3 -2 -1 0 sinking output current (ma) sourcing 1234567 v in = 5.5v v out (mv) normalized to -55c +25c +125c temperature (c) 4.0945 4.0950 4.0955 4.0960 4.0965 4.0970 -40 -25 -10 5 20 35 50 65 80 95 110 125 v out (v) normalized to 4.096v unit 1 unit 2 unit 3 -80 -70 -60 -50 -40 -30 -20 -10 0 psrr (db) no load 100nf load 10nf load 1nf load -80 -70 -60 -50 -40 -30 -20 -10 0 psrr (db) no load 100nf load 10nf load 1nf load 1 10 100 1k 10k 100k 1m 10m frequency (hz) v in (dc) = 5v v in (ac) ripple = 50mv p-p x = 10s/div y = 200mv/div x = 10s/div y = 200mv/div v in v ref x = 50s/div y = 2v/div isl21009mep
7 fn6744.0 december 15, 2008 figure 26. z out vs frequency figure 27. v out noise, 0.1hz to 10hz figure 28. load transient response f igure 29. load transient response typical performance curves (isl21009-41ep) (r ext = 100k ) (continued) 0 20 40 60 80 100 120 140 160 180 200 z out ( ) no load 10nf load 1nf load 1 10 100 1k 10k 100k 1m 10m frequency (hz) 1s/div 20mv/div gain is x10,000 noise is 4.5v p-p +50a -50a x = 5s/div y = 50mv/div no output capacitance 7ma -7ma x = 5s/div y = 500ma/div no output capacitance isl21009mep
8 fn6744.0 december 15, 2008 typical performance curves (isl21009-50ep) (r ext = 100k ) figure 30. i in vs v in , 3 units figure 31. i in vs v in , 3 temperatures figure 32. line regulation figure 33. line regulation over-temperature figure 34. load regulation 0 20 40 60 80 100 120 140 5.50 6.50 7.50 8.50 9.50 10.5 11.5 12.5 13.5 14.5 15.5 16.5 v in (v) i in (a) unit3 unit2 unit1 80 90 100 110 5.50 6.50 7.50 8.50 9.50 10.5 11.5 12.5 13.5 14.5 15.5 16.5 v in (v) i in (a) +25c -40c +125c 4.9994 4.9995 4.9996 4.9997 4.9998 4.9999 5.0000 5.0001 5.50 6.50 7.50 8.50 9.50 10.5 11.5 12.5 13.5 14.5 15.5 16.5 v in (v) (normalized to 5.0v at v in = 10v) v out (v) unit3 unit2 unit1 -400 -350 -300 -250 -200 -150 -100 -50 0 50 100 5.5 6.5 7.5 8.5 9.5 10.5 11.5 12.5 13.5 14.5 15.5 16.5 v in (v) v in = 5.5v v out (mv) normalized to +125c -55c +25c -0.20 -0.15 -0.10 -0.05 0 0.05 0.10 -7 -6 -5 -4 -3 -2 -1 0 sinking output current (ma) sourcing 1234567 v in = 5.5v v out (mv) normalized to +25c +125c -55c isl21009mep
9 fn6744.0 december 15, 2008 figure 35. v out vs temperature figure 36. psrr at different capacitive loads figure 37. line transient response, no capacitive load figure 38. line transient response, 0.001f load capacitance figure 39. turn-on time figure 40. z out vs frequency typical performance curves (isl21009-50ep) (r ext = 100k ) (continued) 4.998 4.999 4.999 5.000 5.000 5.001 5.001 -40 -20 0 20 40 60 80 100 120 140 temperature (c) v out (v) unit 3 unit 2 unit 1 normalized to +25c -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 1 10 100 1k 10k 100k 1m 10m psrr (db) frequency (hz) v in (dc) = 10v v in (ac) ripple = 50mv p-p 10nf 1nf no load 100nf v in = 10v dv in = 1v v in = 10v dv in = 1v 0 2 4 6 8 10 12 0 50 100 150 200 250 300 time (s) v in (v) and v out (v) v in 450na 340na 270na 0 20 40 60 80 100 120 1 10 100 1k 10k 100k 1m frequency (hz) z out (w) 10nf 1nf no load isl21009mep
10 fn6744.0 december 15, 2008 applications information fga technology the isl21009mep voltage refe rence uses floating gate technology to create references with very low drift and supply current. essentially the charge stored on a floating gate cell is set precisely in manufacturing. the reference voltage output itself is a buffered version of the floating gate voltage. the resulting reference device has ex cellent characteristics, which are unique in the industry: very low temperature drift, high initial accuracy, and almost zero supply current. also, the reference voltage itself is not limited by voltage bandgaps or zener settings, so a wide range of reference voltages can be programmed (standard voltage settings are provided, but customer-specific voltages are available). the process used for these reference devices is a floating gate cmos process and the amp lifier circuitry uses cmos transistors for amplifier and output transistor circuitry. while providing excellent accuracy, th ere are limitations in output noise level and load regulation due to the mos device characteristics. these limita tions are addressed with circuit techniques discussed in other sections. micropower operation the isl21009mep consumes extremely low supply current due to the proprietary fga technology. low noise performance is achieved using optimized biasing techniques. supply current is typically 95a and noise is 4.5v p-p benefitting precision, low noise portable applications such as handheld meters and instruments. data converters in particular can utilize the isl21009mep as an external voltage reference. low power dac and adc circuits will realize maximum resolution with lowest noise. figure 41. v out noise, 0.1hz to 10hz figure 42. load t ransient response figure 43. load t ransient response typical performance curves (isl21009-50ep) (r ext = 100k ) (continued) 2mv/div gain is x1000 noise is 4.5v p-p -50a 50a 7ma -7ma isl21009mep
11 fn6744.0 december 15, 2008 board mounting considerations for applications requiring the highest accuracy, board mounting location should be reviewed. the device uses a plastic soic package, which will subject the die to mild stresses when the pc board is heated and cooled, slightly changing the shape. placing the device in areas subject to slight twisting can cause degradation of the accuracy of the reference voltage due to these die stresses. it is normally best to place the device near the edge of a board, or the shortest side, as the axis of bending is most limited at that location. mounting the device in a cutout also minimizes flex. obviously mounting the device on flexprint or extremely thin pc material will likewise cause loss of reference accuracy. noise performance and reduction the output noise voltage in a 0.1hz to 10hz bandwidth is typically 4.5v p-p . the noise measurement is made with a bandpass filter made of a 1-pole high-pass filter with a corner frequency at 0.1hz and a 2-pole low-pass filter with a corner frequency at 12.6hz to create a filter with a 9.9hz bandwidth. noise in the 10khz to 1mhz bandwidth is approximately 40v p-p with no capacitance on the output. this noise measurement is made with a 2 decade bandpass filter made of a 1-pole high-pass filter with a corner frequency at 1/10 of the center frequency and 1-pole low- pass filter with a corner frequency at 10x the center frequency. load capacitance up to 1000pf can be added but will result in only marginal improvements in output noise and transient response. the output stage of the isl21009m ep is not designed to drive heavily capactive loads, so for load capacitances above 0.001f, the noise reduction network shown in figure 44 is recommended. this network reduc es noise significantly over the full bandwidth. noise is reduced to less than 20v p-p from 1hz to 1mhz using this network with a 0.01f capacitor and a 2k resistor in series with a 10f capacitor. also, transient response is improved with higher value output capacitor. the 0.01f value can be increased for better load transient response with little sacrif ice in output stability. . turn-on time the isl21009mep devices have low supply current and thus the time to bias up internal circuitry to final values will be longer than with higher power references. normal turn-on time is typically 100s. this is shown in figure 11. circuit design must take this into account when looking at power-up delays or sequencing. temperature coefficient the limits stated for temperatur e coefficient (tempco) are governed by the method of me asurement. the overwhelming standard for specifying the temper ature drift of a reference is to measure the reference voltage at two temperatures, take the total variation, (v high ? v low ), and divide by the temperature extremes of measurement (t high ?t low ). the result is divided by the nominal reference voltage (at t = +25c) and multiplied by 10 6 to yield ppm/c. this is the ?box? method for specifying temperature coefficient. output voltage adjustment the output voltage can be adjusted up or down by 2.5% by placing a potentiometer from v out to gnd and connecting the wiper to the trim pin. the trim input is high impedance so no series resistance is needed. the resistor in the potentiometer should be a low tempco (<50ppm/c) and the resulting voltage divider should have very low tempco <5ppm/c. a digital potentiometer such as the isl95810 provides a low tempco resistance and excellent resistor and tempco matching for trim applications. v in = 5.0v v in v o gnd isl21009-25ep 0.01f 10f 2k 0.1f 10f figure 44. handling high load capacitance isl21009mep
12 fn6744.0 december 15, 2008 typical application circuits v in = +5.0v 2n2905 2.5v/50ma 0.001f v in v out gnd isl21009mep r = 200 figure 45. precision 2.5v, 50ma reference v out = 2.50v figure 46. 2.5v full scale low-drift, lo w noise, 10-bit adjustable voltage source v in v out gnd 0.1f 0.001f v out + ? v cc r h r l x9119 v ss sda scl 2-wire bus v out (buffered) 10f isl21009-25ep v out = 2.50v el8178 (unbuffered) +3.5v to 16.5v isl21009mep
13 fn6744.0 december 15, 2008 typical application circuits (continued) 0.1f +3.5v to 16.5v v in v out gnd isl21009-25ep v out sense load + ? 10f figure 47. kelvin sensed load el8178 0.1f +3.5v to 16.5v v in v out gnd isl21009-25ep 10f figure 48. output adjustment using the trim pin trim 2.5v 2.5% r l v ss sda scl i 2 c bus v cc r h isl95810 isl21009mep
14 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn6744.0 december 15, 2008 isl21009mep small outline plast ic packages (soic) index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) h x 45 c h 0.25(0.010) b m m notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e? does not include in terlead flash or protrusions. inter- lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. the lead width ?b?, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. controlling dimension: millimete r. converted inch dimensions are not necessarily exact. m8.15 (jedec ms-012-aa issue c) 8 lead narrow body small outline plastic package symbol inches millimeters notes min max min max a 0.0532 0.0688 1.35 1.75 - a1 0.0040 0.0098 0.10 0.25 - b 0.013 0.020 0.33 0.51 9 c 0.0075 0.0098 0.19 0.25 - d 0.1890 0.1968 4.80 5.00 3 e 0.1497 0.1574 3.80 4.00 4 e 0.050 bsc 1.27 bsc - h 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 l 0.016 0.050 0.40 1.27 6 n8 87 a 0 8 0 8 - rev. 1 6/05

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