TESDH5V0A ultra low capacitance esd protection array small signal diode ? meet iec61000-4-4 (eft) rating. 40a (5/50 ? s) ? meet iec61000-4-5 (lightning) rating. 1 a (8/20 s) ? protects four high speed i/o lines ? low capacitance: 0. 5 pf typical (i/o to i/o) ? working voltage : 5v ? case : 2510p10 (dson10) standard package, molded plastic ? digital visual interface (dvi) ? pci express ? serial ata ? usb 3.0 super speed interface part no. package packing marking tes d h5v0 a 2 510p1 0 3 k / 7" reel p524 note : output line ( no internal connection) maximum ratings and electrical characteristics maximum ratingselectrical characteristics 1ma 5v1a ordering information - 15 1 - - units pf w 1 (typ.) c v 6v ua 1a ? terminal: matte tin plated, lead free, solderable per mil-std-202, method 202 guaranteed ? meet iec61000-4-2 (esd) 15kv (air), 8kv (contact) ? marking code : p524 ? molding compound flammability rating : ul 94v-o features mechanical data ? pb free version, rohs compliant, and halogen free peak pulse current (tp = 8/20 s) i pp p pp 15 8 type number rating at 25 c ambient temperature unless otherwise specified. peak pulse power (tp=8/20 s waveform) symbol min max junction and storage temperature range kv v esd vc reverse breakdown voltagereverse leakage current junction capacitance i pp = v r = i r = v reverse stand-off voltage units applications pin configutation ? high defi nition multi-media interface (hdmi) symbol type number - t j , t stg value esd per iec 61000-4-2 (air)esd per iec 61000-4-2 (contact) 2510p10 (dson10) 5 150 ? high temperature soldering guaranteed: 260 c/10s ? weight :15 mg (approximately) packing code . -55 to + 150 . rdg c j i r v (br) v rwm v r =0v, f=1.0mhz clamping voltage version : c1 2 g i h a b e f c d min max min max 2.40 2.60 0.094 0.102 0.90 1.10 0.035 0.043 0.30 0.43 0.01 0.02 0.45 0.55 0.02 0.02 0.50 0.65 0.020 0.026 0.15 0.25 0.006 0.010 0.35 0.45 0.014 0.018 dimensions unit (mm) ab d e f unit (inch) 0.02 bsc c 0.5 bsc 0.63bsc 0.025 bsc g h i 1 in#1 2 in#2 3 gnd 4 in#3 5 in#4 8 gnd 7 output 10 output 6 output 9 output downloaded from: http:///
TESDH5V0A ultra low capacitance esd protection array small signal dioderating and sharacteristic curves 0.01 0.1 1 10 0.1 1 10 100 1000 peak pulse power ppp (kw) 100 120 ) pulse duration (us) time (us) 1.5 fig 4 typical junction capacitance fig 1 non-repetitive peak pulse power vs. pulse time 0 20 40 60 80 0 20 40 60 80 100 120 140 160 180 power rating (% ) 0 0.5 1 012345 normalized capacitance 0 5 10 15 20 25 30 0.1 1 10 100 100 0 (db) 3 f(hz) fig 6 insertion loss 1:-0.073db 900mhz2:-0.065db 1.8ghz 3:-0.107db 2.5ghz 4: -0.6477db 3.0ghz 5:-0.18073db 4.3ghz 1.e+06 1.e+07 1.e+08 1.e+09 1.e+10 -15 -12 -9 -3 -6 0 1 2 4 5 3 fig 2 pulse waveform 0 10 20 30 40 50 60 70 80 90 100 110 0 5 10 15 20 25 30 percent of i pp td=ipp/2 waveform parameters:tr = 8 s, td = 20 s e -1 f = 1.0mhz f = 1.0mhz ambient tempeatature ( o c) reverse voltage(v) 0 5 10 15 20 25 30 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 clamping voltage (v) fig 5 clamping voltage vs. peak pulse current peak pulse current (a) fig 3 admissible power dissipation curve waveform parameters:tr = 8 s, td = 20 s version : c1 2 downloaded from: http:///
TESDH5V0A ultra low capacitance esd protection array small signal diode applications information circuit board layout recommendations for hdmi application ? ultra low capacitance between the pairs while being rated to handle >8kv esd contact discharges and >15kv air discharge ? designed for protection of high-speed interfaces such as hdmi ? the pcb traces are used to connect the pin pairs for each line (pin 1 to pin 10, pin 2 to pin 9, pin 4 to pin 7, pin 5 to pin 6 ) ? signal line enters at pin 1 and exits at pin 10 and the pcb trace connects pin 1 and 10 together. ground is connected at pins 3 and 8. ? one large ground pad should be used in lieu of two separate pads ? each device is in a leadless package that is less than 1.1mm wide ? designed such that the traces flow straight through the device, the narrow package and flow-through design reduces discontinuit ies and minimizes impact on signal integrity ? TESDH5V0A is ultra low capacitance esd protection array designed to protect high speed data interfaces. this series has been specifically designed to protect sensitive components which are connected to high-speed data and transmission lines from overvoltage caused by esd, cde (cable discharge events), and eft (electrical fast transients) ? the combination of small size, low capacitance, and high level of esd protection makes them a flexible solution for application s of high speed interface, ex hdmi, displayporttm, mddi, and esata interfaces. tmds_d2+ tmds gnd TESDH5V0A hdmi connector tmds _ gnd tmds_d2- tmds_d1+ tmds_gnd tmds_d1- tmds_d0+ tmds_gnd tmds_d0- tmds_clk+ tmds_gnd tmds_clk- cec n/c ddc_clk ddc_dat gnd +5v hot plug detection TESDH5V0A tesds5v0a version : c1 2 downloaded from: http:///
TESDH5V0A ultra low capacitance esd protection array small signal diodetape & reel specification suggested pad layout note 1: a 0 , b 0 , and k 0 are determined by component size. the clearance between the components and the cavity must be within 0.05 mm min. to 0.5 mm max. the component cannot rote more than 10 o within the determined cavity. note 2: if b 1 exceeds 4.2 mm(0.165'') for 8 mm embossed tape, the tape may not feed through all tape feeders. note 3: the suggested land pattern dimensions have been provided for reference only, as actual pad layouts may vary despending on application. item symbol dimension (mm) carrier depth k 1.22 max. sprocket hole d 1.50 +0.10 reel outside diameter a 180 1 reel inner diameter d1 50 min. feed hole width d2 13.0 0.5 sprocke hole position e 1.75 0.10 sprocke hole pitch p0 4.00 0.10 embossment center p1 2.00 0.10 overall tape thickness t 0.6 max. tape width w 8.30 max. reel width w1 14.4 max. dimensions unit (inch) unit (mm) a 0.034 0.88 b 0.008 0.20 c 0.020 0.50 d 0.039 1.00 e 0.008 0.20 f 0.016 0.40 h 0.061 1.55 0.027 0.68 g a h g b e f c d direction of feed w1 d1 d2 a top cover tape carieer tape any additional label (if required) tsc label for machine referenceonly including draft and radll concentric around b 0 t top cover tape see note1 b0 k center lines of cavity f e w for components2.0mm x 1.2mm and larger d' d p1 10 pitches cumulativetolerance on tape 2.0mm ( 0.008") b 0 embossment a 0 k 0 b 1 p0 version : c1 2 downloaded from: http:///
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