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Actel
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| Part No. |
ARINC429
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| OCR Text |
...t version ? structural vhdl and verilog netlists ? rtl version ? vhdl or verilog core source code ? synthesis scripts ? verification testbench ? verilog ? user testbenches ? libero ide compatible ? vhdl and verilog development system ? comp... |
| Description |
Bus Interface
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| File Size |
237.12K /
22 Page |
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it Online |
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Atmel
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| Part No. |
ATL60
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| OCR Text |
...matic and Layout NC verilogTM - verilog Simulator PearlTM - Static Path verilog-XLTM - verilog Simulator BuildGatesTM - Synthesis (Ambit) ModelSim(R) - verilog and VHDL (VITAL) Simulator Leonardo SpectrumTM - Logic Synthesis Design Compiler... |
| Description |
The ATL60 series CMOS Gate Arrays are fabricated using a 0.6 micron drawn gate, oxide isolated, triple level metal process. Extensive cell libraries are available and support the major CAD software tools.
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| File Size |
109.90K /
14 Page |
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Triscend
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| Part No. |
TA7S20
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| OCR Text |
...d logic design tools - VHDL and verilog logic synthesis - Schematic entry - VHDL and verilog simulation ! High performance dedicated system bus * Configurable System Interconnect (CSI) bus integrates CSL matrix, CSoC system * 455Mbytes per ... |
| Description |
(TA7S04 / TA7S20) Triscend A7S Configurable System-on-Chip Platform
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| File Size |
1,611.14K /
198 Page |
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it Online |
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Altera Corp
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| Part No. |
EP610PC-15
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| OCR Text |
...of parameterized modules (LPM), verilog HDL, VHDL, and other interfaces to popular EDA tools from manufacturers such as Cadence, Exemplar Logic, Mentor Graphics, OrCAD, Synopsys, Synplicity, and VeriBest
Table 1. Classic Device Features
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| Description |
IC,SIMPLE-EPLD,PAL-TYPE,CMOS,DIP,24PIN,PLASTIC
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| File Size |
311.73K /
42 Page |
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it Online |
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Atmel
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| Part No. |
ATL35
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| OCR Text |
...matic and Layout NC verilogTM - verilog Simulator PearlTM - Static Path verilog-XLTM - verilog Simulator BuildGatesTM - Synthesis (Ambit) ModelSim(R) - verilog and VHDL (VITAL) Simulator Leonardo SpectrumTM - Logic Synthesis Design Compiler... |
| Description |
The ATL35 series ASIC family is fabricated on a 0.35 micron CMOS process with up to four levels of metal. This family features arrays with up to 2.7 million routable gates and 976 pins. The high density and high pin count capabilities of t
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| File Size |
268.46K /
21 Page |
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Altera Corporation
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| Part No. |
FLEX10K FLEX10KA FLEXB10KA FLEXB10KE
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| OCR Text |
...s (LPM), DesignWare components, verilog HDL, VHDL, and other interfaces to popular EDA tools from manufacturers such as Cadence, Exemplar Logic, Mentor Graphics, OrCAD, Synopsys, Synplicity, VeriBest, and Viewlogic
Altera Corporation
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| Description |
Embedded Programmable Logic Family
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| File Size |
974.74K /
114 Page |
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it Online |
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Fujitsu, Ltd.
Fujitsu Limited
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| Part No. |
CE71L5 CE71JE CE71L9 CE71J3 CE71TC
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| OCR Text |
...ASIC Design Kit and EDA Support verilog Logic Simulators from Cadence, Synopsys, and Mentor VHDL/VITAL Logic Simulators from Synopsys, Cadence, and Mentor Synthesis, power, DFT, and STA tools from Synopsys Other EDA tools verilog-XL, NC-Ver... |
| Description |
0.25um CMOS Technology 0.25微米CMOS工艺
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| File Size |
53.19K /
4 Page |
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it Online |
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Altera Corporation
http://
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| Part No. |
EPF10K130E EPF10K100E EPF10K30E EPF10K50EFC484-1 EPF10K50SFC484-2X
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| OCR Text |
...s (LPM), DesignWare components, verilog HDL, VHDL, and other interfaces to popular EDA tools from manufacturers such as Cadence, Exemplar Logic, Mentor Graphics, OrCAD, Synopsys, Synplicity, VeriBest, and Viewlogic Notes (1), (2) 600-Pin 67... |
| Description |
Embedded Programmable Logic Device
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| File Size |
597.44K /
100 Page |
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it Online |
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Price and Availability
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