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For verilog Found Datasheets File :: 518 Search Time::2.032ms
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				Actel Corporation http://
Part No.	1553BBC-AN 1553BBC-AR 1553BBC-XX 1553BBC-EV 1553BBC-SN 1553BBC-SR 1553BBC-UR CORE1553BBC-SN
OCR Text	...Developed Testbenches, VHDL and verilog * Synthesis and Simulation Support * * Synthesis: Synplicity(R), Synopsys(R) (Design Compiler(R)/ FPGA CompilerTM/FPGA ExpressTM), ExemplarTM Simulation: Vital-Compliant VHDL Simulators and OVI...
Description	Core1553BBC MIL-STD-1553B Bus Controller
File Size	188.39K / 30 Page	View it Online	Download Datasheet

				Altera Corporation
Part No.	ACEX1K03 EP1K30TC144-3N EP1K10TC144-3N EP1K100FC256-3 EP1K100FI484-2 EP1K100QC208-3 EP1K30FC256-3 EP1K50QC208-3 EP1K50QC208-3N EP1K10TC144-1 EP1K50TC144-3N EP1K10TC144-2N
OCR Text	...s (LPM), DesignWare components, verilog HDL, VHDL, and other interfaces to popular EDA tools from manufacturers such as Cadence, Exemplar Logic, Mentor Graphics, OrCAD, Synopsys, Synplicity, VeriBest, and Viewlogic Notes (1), (2) 208-Pin PQ...
Description	LOADABLE PLD, 0.4 ns, PQFP144 ACEX 1K Programmable Logic Device Family
File Size	532.59K / 86 Page	View it Online	Download Datasheet

				Digital Core Design
Part No.	DR8051
OCR Text	...e code: VHDL Source Code or/and verilog Source Code or/and Encrypted, or plain text EDIF netlist VHDL & verilog test bench environment Active-HDL automatic simulation macros ModelSim automatic simulation macros Tests with reference respo...
Description	High Performance 8-bit Microcontroller ver 3.10
File Size	110.25K / 8 Page	View it Online	Download Datasheet

				Digital Core Design
Part No.	DR8051XP
OCR Text	...code: VHDL Source Code or/and verilog Source Code or/and Encrypted, or plain text EDIF netlist VHDL & verilog test bench environment Active-HDL automatic simulation macros ModelSim automatic simulation macros Tests with reference resp...
Description	High Performance Configurable 8-bit Microcontroller ver 3.10
File Size	129.23K / 11 Page	View it Online	Download Datasheet

				Digital Core Design
Part No.	DR8051CPU
OCR Text	...e code: VHDL Source Code or/and verilog Source Code or/and Encrypted, or plain text EDIF netlist VHDL & verilog test bench environment Active-HDL automatic simulation macros ModelSim automatic simulation macros Tests with reference respo...
Description	High Performance 8-bit Microcontroller ver 3.10
File Size	103.94K / 7 Page	View it Online	Download Datasheet

				Altera International Limited Altera Corporation
Part No.	FLEX8000 FLEX80001 EPF8452A EPF8282A EPF8820A EPF81188A EPF8820ARC208-4N EPF8282ATC100-4 EPF8452ATC100-4 EPF8282ALC84-4 EPF8282ALC84-4N EPF8820ATC144-4 FLEX-8000 EPF8282ATC100-3 EPF8452ATC100-4N
OCR Text	...of parameterized modules (LPM), verilog HDL, VHDL, and other interfaces to popular EDA tools from manufacturers such as Cadence, Exemplar Logic, Mentor Graphics, OrCAD, Synopsys, Synplicity, and Veribest Note (1) 192Pin PGA 208Pin PQFP 225P...
Description	Programmable Logic Device Family LOADABLE PLD, PQFP208 HEAT SINK, POWER, QFP-208
File Size	363.92K / 62 Page	View it Online	Download Datasheet

				Actel Corporation
Part No.	CORE429-AN CORE429-AR CORE429-EV CORE429-SN CORE429-SR CORE429-UR CORE429-XX CORE429-M CORE429-OC CORE429-RC
OCR Text	...nment (IDE) Structural VHDL and verilog Netlists VHDL or verilog Core Source Code Synthesis Scripts Netlist Version RTL version - - Key Features * * * * Supports ARINC Specification 429-16 Configurable up to 16 Rx and 16 Tx Channels ...
Description	ARINC 429 Bus Interface
File Size	189.11K / 22 Page	View it Online	Download Datasheet

				Cypress
Part No.	CY3148
OCR Text	...0% automatic fitting * VHDL and verilog post-layout timing models * Complete solution from design entry to programming Programming Warp generates JEDEC programming files for all Cypress devices which can be used for in-system reprogrammi...
Description	Cypress Cadence Bolt-in Kit From old datasheet system
File Size	23.04K / 1 Page	View it Online	Download Datasheet

				Digital Core Design
Part No.	DI2CMS
OCR Text	... technology independent VHDL or verilog design that can be implemented in a variety of process technologies and can be fully customized accordingly to Support for all transmission speeds Standard (up to 100 kb/s) Fast (up to 400 kb/...
Description	I2C Bus Interface - Master/Slave I2C Bus Interface - Master/Slave
File Size	117.55K / 6 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY3138 CY3138R62
OCR Text	verilog CPLD Software Features * verilog (IEEE 1364) high-level language compilers with the following features: -- Designs are portable across multiple devices and/or EDA environments -- Facilitates the use of industry-standard simulation...
Description	Warp Enterprise(TM) verilog CPLD Software Warp Enterprise verilog CPLD Software Warp Enterprise垄芒 verilog CPLD Software
File Size	57.50K / 6 Page	View it Online	Download Datasheet

For verilog Found Datasheets File :: 518 Search Time::2.032ms
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