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  1g 2g Datasheet PDF File

For 1g 2g Found Datasheets File :: 1334    Search Time::0.734ms    
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    HD74CDCF2509B

HITACHI[Hitachi Semiconductor]
Part No. HD74CDCF2509B
OCR Text ...led separately via the control (1g and 2g) inputs. When the G inputs are high, the outputs switch in phase and frequency with CLK; when the G inputs are low, the outputs are disabled to the logic-low state. Unlike many products containing P...
Description 140 MHz, 0 to 85°C Operation 3.3-V Phase-lock Loop Clock Driver
140 MHz, 0 to 85C Operation 3.3-V Phase-lock Loop Clock Driver
140 MHz, 0 to 85∑C Operation 3.3-V Phase-lock Loop Clock Driver

File Size 39.84K  /  11 Page

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    HC2509C

Hynix Semiconductor
Part No. HC2509C
OCR Text ...arately via the control inputs (1g and 2g). output signal duty cycles are adjusted to 50 percent, independent of the duty cycle at clk. the hc2509c is sp ecially designed to interface with high speed sdram applications in the range o...
Description Phase-Locked Loop Clock Distribution for Synchronous DRAM Applications

File Size 81.64K  /  6 Page

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    MM74HCT240 MM74HCT240MTC MM74HCT240N MM74HCT240SJ MM74HCT240WM MM74HCT244 MM74HCT244MTC MM74HCT244N MM74HCT244SJ MM74HCT

FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor Corporation
Part No. MM74HCT240 MM74HCT240MTC MM74HCT240N MM74HCT240SJ MM74HCT240WM MM74HCT244 MM74HCT244MTC MM74HCT244N MM74HCT244SJ MM74HCT244WM MM74HCT240WMX MM74HCT240SJX MM74HCT244WMXNL MM74HCT244WMX
OCR Text ...ice has two active low enables (1g and 2g), and each enable independently controls 4 buffers. All inputs are protected from damage due to static discharge by diodes to VCC and Ground. Features s TTL input compatible s Typical propagatio...
Description Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer
Inverting Octal 3-STATE Buffer • Octal 3-STATE Buffer
From old datasheet system
Precision Air-Core Tach/Speedo Driver with Return to Zero; Package: SOIC-20 WB; No of Pins: 20; Container: Rail; Qty per Container: 38

File Size 93.63K  /  7 Page

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