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oH V SC AV ER OM AI SIO PL LA N IA BL S NT E
TISP3600F3, TISP3700F3 DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
*R
TISP3600F3, TISP3700F3
IEEE Std 802.3 LAN and MAN Applications Ion-Implanted Breakdown Region Precise and Stable Voltage
Terminals Device `3600 `3700 T&G, R&G VDRM V 420 500 V(BO) V 600 700 T&R VDRM V 840 1000 V(BO) V 1200 1400
SL Package (Top View)
T G R
1 2 3
MDXXAGB
Device Symbol
T R
Rated for International Surge Wave Shapes
Wave Shape 2/10 8/20 10/160 10/700 10/560 10/1000 Standard GR-1089-CORE IEC 61000-4-5 FCC Part 68 FCC Part 68 ITU-T K.20/21 FCC Part 68 GR-1089-CORE ITSP A 190 175 110 70 50 45
SD3XAA
G Terminals T, R and G correspond to the alternative line designators of A, B and C
How To Order
For Standard Termination Finish Order As TISP3600F3SL TISP3700F3SL For Lead Free Termination Finish Order As TISP3600F3SL-S TISP3700F3SL-S
Device TISP3600F3 TISP3700F3
Package SL, Single-in-line SL, Single-in-line
Carrier TUBE TUBE
Description These devices are designed to limit overvoltages between systems and so protect their insulation. A single device can be used in two ways; as a 3-point protector or as a 2-point protector. In the 3-point mode, the G terminal is connected to the system protective ground and the R and T terminals are connected to the two conductors being protected. For the TISP3600F3, each conductor will have its voltage limited to 600 V from the protective ground. The maximum inter-conductor voltage will be limited to 1200 V. In the 2-point mode, only the outer R and T terminals are connected and the G terminal is unconnected. The TISP3700F3 limits the voltage between the two connection nodes to 1400 V with voltage limiting beginning above 1000 V. Two TISP3700F3 devices connected in series would allow insulation testing to 2000 V ( 1400 Vrms ). The protector consists of two symmetrical voltage-triggered bidirectional thyristors with a common connection. Overvoltages are normally caused by a.c. power system or lightning flash disturbances which are coupled on to the system. These overvoltages are initially clipped by breakdown clamping until the voltage rises to the breakover level, which causes the device to crowbar into a low-voltage on state. This low-voltage on state causes the current resulting from the overvoltage to be safely diverted through the device. The high crowbar holding current prevents d.c. latchup as the diverted current subsides. The TISP3x00F3 is guaranteed to voltage limit and withstand the listed international lightning surges in both polarities.
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex NOVEMBER 1997 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.
TISP3600F3, TISP3700F3
Absolute Maximum Ratings, TA = 25 C (Unless Otherwise Noted)
Rating Repetitive peak off-state voltage, (R-G or T-G value) Non-repetitive peak on-state pulse current (see Notes 1 and 2) 2/10 (Telcordia GR-1089-CORE, 2/10 voltage wave shape) 1/20 (I TU-T K.22, 1.2/50 voltage wave shape, 25 resistor) 8/20 (I EC 61000-4-5, combination wave generator, 1.2/50 voltage wave shape) 10/160 (F CC Part 68, 10/160 voltage wave shape) 4/250 (I TU-T K.20/21, 10/700 voltage wave shape, simultaneous) 5/310 (I TU-T K.20/21, 10/700 voltage wave shape, single) 5/320 (F CC Part 68, 9/720 voltage wave shape, single) 10/560 (F CC Part 68, 10/560 voltage wave shape) 10/1000 (Telcordia GR-1089-CORE, 10/1000 voltage wave shape) Non-repetitive peak on-state current (see Notes 1 and 2) 50/60 Hz, 1s ITSM di T/dt TJ T stg IPPSM 190 100 175 110 95 70 70 50 45 6 250 -40 to +150 -65 to +150 A A/s C C A TISP3600F3 TISP3700F3 Symbol VDRM Value 420 500 Unit V
Initial rate of rise of on-state current, Linear current ramp, Maximum ramp value < 38 A Junction temperature Storage temperature range
NOTES: 1. Initially, the TISP(R) device must be in thermal equilibrium with TJ = 25 C. 2. These non-repetitive rated currents are peak values of either polarirty. The rated current values may be applied to the R or T terminals. Additionally, both R and T terminals may have their rated current values applied simultaneously (in this case the G terminal return current will be the sum of the currents applied to the R and T terminals). The surge may be repeated after the TISP returns to its initial conditions.
Recommended Operating Conditions
Component Series resistor for GR-1089-CORE first-level surge survival Series resistor for ITU-T recommendation K.20 and K.21 R1, R2 Series resistor for FCC Part 68 9/720 survival Series resistor for FCC Part 68 10/160, 10/560 survival Min 15 0 0 10 Typ Max Unit
Electrical Characteristics for the T and R Terminals, TA = 25 C
Parameter IDRM Repetitive peak offstate current VD = 2V DRM dv/dt = 700 V/ms, R SOURCE = 300 dv/dt = 700 V/ms, R SOURCE = 300 I T = 5 A, di/dt = +/-30 mA/ms Linear voltage ramp, Maximum ramp value < 1.7VDRM VD = 50 V 5 10 TISP3600F3 TISP3700F3 0.1 0.15 Test Conditions Min Typ Max 10 1200 1400 Unit A V A A kV/s A
V(BO) Breakover voltage I(BO) IH dv/dt ID Breakover current Holding current Critical rate of rise of off-state voltage Off-state current
NOVEMBER 1997 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.
TISP3600F3, TISP3700F3
Electrical Characteristics for the T and R Terminals, TA = 25 C (Continued)
Parameter Coff NOTE Off-state capacitance Test Conditions f = 100 kHz, V d = 1 V rms, VD = 0, (See Note 3) Min Typ Max 0.1 Unit pF
3: These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The third terminal is connected to the guard terminal of the bridge.
Electrical Characteristics for the T and G or the R and G Terminals, TA = 25 C
Parameter IDRM Repetitive peak offstate current VD = V DRM dv/dt = 700 V/ms, R SOURCE = 300 dv/dt = 700 V/ms, R SOURCE = 300 I T = 5 A, di/dt = +/-30 mA/ms Linear voltage ramp, Maximum ramp value < 0.85VDRM V D = 50 V f = 100 kHz, Vd = 1 V rms, VD = 0, (See Note 4) f = 100 kHz, Vd = 1 V rms, VD = -50 V 44 11 TISP3600F3 TISP3700F3 0.1 0.15 5 10 74 20 Test Conditions Min Typ Max 5 600 700 Unit A V A A kV/s A pF
V(BO) Breakover voltage I(BO) IH dv/dt ID Coff NOTE Breakover current Holding current Critical rate of rise of off-state voltage Off-state current Off-state capacitance
4: These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The third terminal is connected to the guard terminal of the bridge.
Thermal Characteristics
Parameter RJA NOTE Junction to free air thermal resistance Test Conditions EIA/JESD51-3 PCB, IT = ITSM(1000) , TA = 25 C, (see Note 5) Min Typ Max 50 Unit C/W
5: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.
NOVEMBER 1997 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.
TISP3600F3, TISP3700F3
Parameter Measurement Information
+i ITSP Quadrant I Switching Characteristic
ITSM V(BO) IH IDRM -v VDRM IDRM IH V(BO) ITSM Quadrant III Switching Characteristic I ITSP -i PMXXAH A VD ID ID
VD
I(BO)
VDRM
+v
I(BO)
Figure 1. Voltage-Current Characteristic for R-G and T-G Terminal Pairs
+i ITSP
Quadrant I Switching Characteristic
ITSM
V(BO)
IH IDRM -v VDRM IDRM IH V(BO) ITSM Quadrant III Switching Characteristic ITSP -i PMXXAJ A VD ID ID VD VDRM +v I(BO)
I(BO)
Figure 2. Voltage-Current Characteristic for R-T Terminal Pair
NOVEMBER 1997 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.
TISP3600F3, TISP3700F3
Typical Characteristics
OFF-STATE CURRENT vs JUNCTION TEMPERATURE
100
TC3LAF
1.10
NORMALIZED BREAKOVER VOLTAGE vs JUNCTION TEMPERATURE TC3MAIA
Normalized Breakover Voltage
10 ID - Off-State Current - A
1.05
1
0*1
V D = 50 V VD = -50 V
1.00
0*01
0*001 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C
0.95 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C
Figure 3.
Figure 4.
HOLDING CURRENT vs JUNCTION TEMPERATURE
0.5 0.4
TC3LAHA
IH - Holding Current - A
0.3
0.2
0.1 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C
Figure 5.
NOVEMBER 1997 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.
TISP3600F3, TISP3700F3
Thermal Information
NON-REPETITIVE PEAK ON-STATE CURRENT vs CURRENT DURATION TI4FA A
20 ITSM(t) - Non-Repetitive Peak On-State Current - A 15 10 9 8 7 6 5 4 3 2 1.5 1 0*1 VGEN = 1500 V rms, 50/60 Hz RGEN = 1.4*VGEN/ITSM(t) EIA/JESD51-2 ENVIRONMENT EIA/JESD51-3 PCB, TA = 25 C SIMULTANEOUS OPERATION OF R AND T TERMINALS. G TERMINAL CURRENT = 2xI TSM(t)
1
10 100 t - Current Duration - s
1000
Figure 6.
NOVEMBER 1997 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.
TISP3600F3, TISP3700F3
APPLICATIONS INFORMATION
IEC 60950, EN 60950, UL 1950 and CSA 22.2 No.950
The `950 family of standards have certain requirements for equipment (EUT) with incoming lines of telecommunication network voltage (TNV). Any protector from a TNV conductor to protective ground must have a voltage rating of at least 1.6 times the equipment rated supply voltage (Figure 7). The intent is to prevent the possibility of the a.c. main supply voltage from feeding into the telecommunication network and creating a safety hazard. International and European equipment usually have a maximum rated voltage of 230 V rms, 240 V rms or 250 V rms. Multiplying the 250 V value by 1.6 gives a protector VDRM value of 400 V. Allowing for operation down 0 C gives a VDRM requirement of 420 V at 25 C. This need is met by the TISP3600F3.
Overvoltage Protection bridging insulation
AC SUPPLY
Te lecommunication network connection EUT Insulation
Th1 Th2
Protective ground connection
TISP3600F3
AI3XAC
Figure 7. '950 TNV Network Insulation from Protective Ground
LAN System Insulation Protection
Some wired systems are not directly connected to ground and are either floating or have a high resistance to ground. Induced transients may cause high voltages relative to ground, resulting in arcing across insulation at wiring junctions. Arcing often leaves carbonized tracks which can degrade system performance. Where the system is carrying a power feed, current conduction through the carbonized track may cause a safety hazard.
Th3
Th2 D7 Th1 D5 D3 D1
TISP 3x00F3
TISP 3x00F3
D8 TISP 4xxx
D6
D4
D2
AI3XAB
SYSTEM CONDUCTORS
Figure 8. System Insulation Protection
In Figure 8, a low-protector, Th1, from a TISP4xxx series limits the differential conductor voltage of the system. The use of a diode bridge, D1 through D4, reduces the capacitive loading of the protectors on the system and can be extended to protect more conductors as shown by the dotted diodes D5 and D6. Low voltage diodes can be used as the maximum reverse voltage stress is limited to the V(BO) value of the TISP4xxx protector plus the diode forward recovery voltage. Steering diodes D7 and D8 and high-voltage protector Th2 limit the conductor voltage to ground. The limiting voltage is set by the choice of protector, TISP3600F3, 1200 V or TISP3700F3, 1400 V, and the number connected in series (one extra protector Th3 shown dotted).
NOVEMBER 1997 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.
TISP3600F3, TISP3700F3
APPLICATIONS INFORMATION
LAN System Insulation Protection (continued)
IEEE Std 802.3, 2000 Edition (IEEE Standard for Information technology-- Telecommunications and information exchange between systems-- Local and metropolitan area networks-- Specific requirements, Part 3: Carrier sense multiple access with collision detection (CSMA/CD) access method and physical layer specifications) specifies three network insulation withstands: 1.5 kV rms a.c., 2.25 kV d.c. and 2.4 kV 1.2/50 impulse. Under these conditions there shall be no insulation breakdown, as defined in IEC 60950:1991. Also, there is a 2 M insulation resistance minimum requirement measured at 500 V d.c. (250 A maximum). In Figure 8, at least one protection element of a TISP3700F3 must be used to give the 500 V working voltage (VDRM) to meet the insulation resistance requirement. To avoid breakover during the 2.4 kV impulse test, five TISP3700F3 protection elements (2.5 kV VDRM, 2-1/2 SL packages) or six TISP3600F3 elements (2.52 kV VDRM, 3 SL packages) are required. Transmitters are required to withstand a 1 kV 0.3/50 commonmode impulse. A TISP3700F3 (1 kV VDRM), from each conductor to ground at the transmitter, would not breakover during the impulse.
BOD Replacement
Figure 9a shows a traditional overvoltage protection scheme for a high power switching thyristor, Th1. The protection voltage level is set by a BOD (BreakOver Diode) thyristor. Potentially damaging voltage transients cause the BOD to crowbar which turns on thyristor Th1. The on state of thyristor Th1 causes the current drawn by the load from the d.c. voltage supply +V to continuously increase until the fast acting fuse F1 operates. Resistor R1 limits the peak BOD current and diode D1 protects the unidirectional BOD against reverse polarity voltage. Resistor R2 provides a d.c. return, and with capacitor C1, forms a low pass network to prevent false triggering from noise. Further trigger voltage discrimination and isolation is given by the series combination of zener diode D2 and reverse blocking diode D3. Capacitor C2 and Resistor R3 form the normal snubber network for the thyristor Th1.
+V F1 R1 D1 Th1 BOD D2 R2 C1 a) GATE DRIVE D3 C2 D2 R2 C1 b) GATE DRIVE D3 C2 R3 TISP 3x00F3 Th1 LOAD R1 R3 +V F1 LOAD
AI3XAA
n
Figure 9. Thyristor Protection
Figure 9b shows the TISP3x00F3 replacing the unidirectional BOD and reverse polarity protection diode, D1. Reverse polarity protection is not needed for the TISP3x00F3 as it is bidirectional.
NOVEMBER 1997 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.
TISP3600F3, TISP3700F3
MECHANICAL DATA
Device Symbolization Code
Devices will be coded as follows:
DEVICE TISP36 00F3 TISP37 00F3
SYMBOLIZATION CODE SP3600F3 SP3700F3
NOVEMBER 1997 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.
TISP3600F3, TISP3700F3
MECHANICAL DATA
SL003 3-pin Plastic Single-In-Line Package
This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly.
SL003
9.25 - 9.75 (0.364 - 0.384) DIMENSIONS ARE: MILLIMETERS (INCHES)
3.20 - 3.40 (0.126 - 0.134)
Index Notch
8.31 (0.327) MAX. 12.9 (0.492) MAX.
6.10 - 6.60 (0.240- 0.260)
4.267 (0.168) MIN.
1
2
3
2.54 Typical (0.100) (See Note A) 2 Places 0.203 - 0.356 (0.008- 0.014)
1.854 (0.073) MAX. 0.559 - 0.711 (0.022 - 0.028) 3 Places
MDX XCEB
NOTES: A. Each pin centerline is located within 0.25 (0.010) of its true longitudinal position. B. Body molding flash of up to 0.15 (0.006) may occur in the package lead plane.
"TISP" is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in U.S. Patent and Trademark Office. "Bourns" is a registered trademark of Bourns, Inc. in the U.S. and other countries.
NOVEMBER 1997 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.

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