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  ddr1.0 Datasheet PDF File

For ddr1.0 Found Datasheets File :: 267    Search Time::1.328ms    
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    STI5251

STMicroelectronics
Part No. STI5251
OCR Text ...lications cpu (450 mhz) 16-bit ddr1/ddr2 comp atible local memory interface (lmi) embedded dvb-c or dvb-t demodulator multi-stream, dvr ...0 host controller with ph y and ulpi, sdio sd- mmc controller and ethernet gmac controller with /m...
Description Advanced SD STB processor with integrated DVB-T/DVB-C demodulator

File Size 65.78K  /  4 Page

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    Motorola Semiconductor
Part No. MPC8347EA
OCR Text ...rchitecture ? double data rate, ddr1/ddr 2 sdram memory controller ? programmable timing support ing ddr1 and ddr2 sdram ? 32- or 64-bit dat...0 10/100/1000 seq pci dma ethernet 10/100/1000 ethernet mpc8347ea powerquicc ii pro integrated...
Description Integrated Host Processor Hardware Spec

File Size 1,354.32K  /  120 Page

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    VCN70BADJTU-1C

Murata Manufacturing Co., Ltd.
Part No. VCN70BADJTU-1C
OCR Text ...ESCRIPTION Designed to support DDR1, DDR2 and DDR3 SDRAM memory power requirements, the VCN60/70 Series point-of-load, non-isolated DC/DC c...0.1% trim resistor @ 1.2V 20MHz bandwidth 140W max output 100% load 12VIN, 1.8VOUT MIN. 0.6 TY...
Description High Efficiency, High Current Density, 60 or 70 Amp Single Inline Package DC/DC Converters

File Size 293.58K  /  7 Page

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    STIH246

STMicroelectronics
Part No. STIH246
OCR Text ...t40 applications cpu 16/32-bit ddr1/ddr2 compatible lmi multi-stream, dvr capable transport stream processing extensive connectivity (dual usb 2.0 hosts, e-sata, ethernet ma c/mii/rmii, and pci) advanced security and drm support inclu...
Description Advanced STB decoder with integrated dual silicon tuner and dual DVB-S2 demodulator

File Size 70.48K  /  4 Page

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    AME9172 AME9172AAHAZ AME9172AAZAZ

Analog Microelectronics
Part No. AME9172 AME9172AAHAZ AME9172AAZAZ
OCR Text ...5J, unless otherwise specified: DDR1 => VIN = 2.5V, VCNTL = 3.3V, VREFEN = 0.5VIN. (Note2) Parameter Output Offset Voltage Load Regulation (DDR 1 / 2 / 3) Symbol VOS VLOAD Test Condition IOUT = 0A (Note 1) IL = 0 to 1.5A (Fig 4) IL = 0 to ...
Description Bus Termination Regulator

File Size 408.76K  /  16 Page

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    Applied Micro Circuits, Corp.
Part No. PPC405EXR-SPC400T PPC405EXR-NPC400T APPLIEDMICROINC-PPC405EXR-NPC400T
OCR Text ...uarts, and devices on the ebc ? ddr1/2 sdram interface operating up to 400 mbps ? one one-lane pci express interfaces operating up to 2.5 ...0 otg port configurable as either host or device ? programmable universal interrupt controller (uic...
Description 32-BIT, 400 MHz, RISC PROCESSOR, PBGA388 27 X 27 MM, PLASTIC, MS-034C, EBGA-388

File Size 548.32K  /  76 Page

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    Applied Micro Circuits, Corp.
Part No. 405EXR
OCR Text ...ensure design flexibility, both ddr1 and ddr2 memory are supported at a maximum data rate of 400mbps for ddr2. ethernet interface mac to ...0 on-the-go able to support either devi ce or host modes, with data rates of up to 480mbps. externa...
Description Embedded Processor 嵌入式处理器

File Size 171.81K  /  2 Page

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    ADSP-BF542 ADSP-BF544 ADSP-BF548 ADSP-BF549 ADSP-BF548BBCZ-5X

ANALOG DEVICES INC
Part No. ADSP-BF542 ADSP-BF544 ADSP-BF548 ADSP-BF549 ADSP-BF548BBCZ-5X
OCR Text ...) DAB1 16-BIT DMA DAB0 BOOT ROM DDR1 16 EXTERNAL PORT NOR, DDR1 CONTROL ATAPI ASYNC 16 NAND FLASH CONTRLOLLER EPPI (0-2) PIXEL COMPOSITOR 16 SPORT (0-1) SD / SDIO 32 SPORT (2-3) PORTS B HOST DMA INTERRUPTS UART (0-1) UART (2-3) MXV...
Description 16-BIT, 50 MHz, OTHER DSP, PBGA400
Embedded Processor

File Size 1,190.12K  /  82 Page

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    SC2596SETRT SC2596EVB

Semtech Corporation
Part No. SC2596SETRT SC2596EVB
OCR Text ...te power supply to support both DDR1 and DDR2 applications. AVCC and PVCC can be tied together for DDR1 and can also be separated for DDR2. ...0 cause a large trace inductance and trace resistance. Consider the load transient condition, a f...
Description Low Voltage Integrated DDR Termination Regulator

File Size 305.79K  /  13 Page

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    NCV51200MWTXG

ON Semiconductor
Part No. NCV51200MWTXG
OCR Text ...amp v tt termination regulator ddr1, ddr2, ddr3, lpddr3, ddr4 the ncp51200 is a source/sink double data rate (ddr) termination regulator sp...0.5 v ? active bus termination http://onsemi.com dfn10, 3x3, 0.5p case 485c device package shipping ...
Description    Termination Regulator

File Size 140.52K  /  7 Page

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For ddr1.0 Found Datasheets File :: 267    Search Time::1.328ms    
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