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fifo Datasheet PDF File

For fifo Found Datasheets File :: 7933 Search Time::1.36ms
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				Digital Core Design
Part No.	DSPI-fifo
OCR Text	fifo Serial Peripheral Interface Master/Slave with fifo ver 1.07 OVERVIEW The DSPI_fifo is a fully configurable SPI master/slave device, which allows user to configure polarity and phase of serial clock signal SCK. The DSPI_fifo allows t...
Description	Serial Peripheral Interface Master/Slave with fifo
File Size	91.80K / 6 Page	View it Online	Download Datasheet

				ATMEL Corporation
Part No.	AT7910EKB-SV AT7910EKB-E AT7910EKB-MQ
OCR Text	... ports each comprising an input fifo and an output fifo. ? a non-blocking crossbar switch connec ting any input port to any output port. ? an internal configuration port accessible via t he crossbar switch from the external parallel input/...
Description	SpW-10X SpaceWire Router
File Size	117.77K / 19 Page	View it Online	Download Datasheet

				ETC Broadcom Corporation.
Part No.	BCM1250
OCR Text	... @128 Gbps DMA 10/100/ 1000 MAC fifo DMA 10/100/ 1000 MAC DMA 10/100/ 1000 MAC fifo 16-50 Gbps 55 Mbps I/O Bridge Generic Bus and Flash I/O PCI/HT Bridge 32-Bit PCI HT Host Bridge 1 Gbps 3 x GMII / 2 x 16-bit fifo @ 2 Gbps...
Description	HIGH PERFORMANCE INTEGRATED 64 BIT MULTIPROCESSOR
File Size	136.73K / 2 Page	View it Online	Download Datasheet

				Actel Corporation
Part No.	A3P060 A3P1000
OCR Text	...sram (except x18) 24 sram and fifo configurations with synchronous operation up to 350 mhz programmable embedded fifo control logic ? table 1 proasic3 product family a3p030 a3p060 a3p125 a3p250 a3p400 a3p600 a3p1000 system gates 30...
Description	(A3Pxxx) ProASIC3 Flash Family FPGAs
File Size	1,379.41K / 180 Page	View it Online	Download Datasheet

				Electronic Theatre Controls, Inc. ETC
Part No.	BCM5700
OCR Text	...eive GMII Receive MAC 128 fifo Rule Check 96 KB Packet Buffer Memory Queue Memory Registers Statistics Frame Buffer Manager Transmit GMII Transmit MAC 128 fifo Memory Arbiter Receive DMA ScratchPad Memory Boot Processor Tr...
Description	PCI - X 10/100/1000 BASE -T CONTROLLER 的PCI - 10/100/1000 Base - T型控制器
File Size	150.29K / 2 Page	View it Online	Download Datasheet

				Broadcom
Part No.	BCM8152
OCR Text	...tx and rx lock detect 10-word fifo with overflow alarm absorbs system clock jitter reference clock: 1/16 or 1/64 of the selectable data rate selectable rx clock and rx data squelch selectable loop timing mode internal phase detect...
Description	10-Gbps Transceiver with 10G Clock, Bus Skew and Limiting Amplifier
File Size	107.42K / 2 Page	View it Online	Download Datasheet

				Electronic Theatre Controls, Inc. ETC[ETC]
Part No.	BCM8112
OCR Text	...dge routers * On-chip 64 x 9 fifo to eliminate system timing issues * Core power supply: 1.8V I/O power * CMOS supplies: 1.8V LVDS, 3.3V STL, and 3.3V * Power consumption: 1700 mW typical * Standard CMOS fabrication process * 452-pin BGA...
Description	16BIT LVDS AND 64BIT LVPECL INTERFACE
File Size	34.89K / 2 Page	View it Online	Download Datasheet

				Broadcom ETC Electronic Theatre Controls, Inc.
Part No.	BCM8128
OCR Text	...skew control * On-chip 16 x 10 fifo eliminates system timing issues * Serial data polarity invert Telcordia, ITU-T, ANSI, and IEEE 802.3ae industry standards. * Reduces design cycle and time to market. * High level of integration allows...
Description	Multirate 10-Gbps SONET/SDH/10GE/FEC Transmitter MULTI RATE 10GBPS SONET / SDH/ 10GE/FEC MUX
File Size	113.87K / 2 Page	View it Online	Download Datasheet

				ETC
Part No.	BCM8152
OCR Text	...) Tx and Rx lock detect 10-word fifo with overflow alarm absorbs system clock jitter Reference clock: 1/16 or 1/64 of the selectable data rate Selectable Rx clock and Rx data squelch upon ALOSB Selectable loop timing mode SUMMARY OF BENE...
Description	10 GBPS TRANSCEIVER WITH 10G CLOCK, BUS SKEW, AND LIMITING AMPLIFIER
File Size	125.98K / 2 Page	View it Online	Download Datasheet

				BOARDCOM[Broadcom Corporation.] ETC
Part No.	BCM8211 BCM821104
OCR Text	...k detect Elastic buffering with fifo overflow alarm Selectable 77.76/155.52-MHz reference clock Selectable RX clock and RX data squelch on LOS Selectable loop timing mode Single 2.5V or dual 2.5V/3.3V supplies Power dissipation: 1.2W typica...
Description	2.488-Gbps Transceiver with Internal Loop Timing 2.488 GBPS SONET/SDH TRANSCEIVER WITH INTERNAL LOOP TIMING 2.488 GBPS SONET/ SDH TRANSCEIVER WITH INTERNAL LOOP TIMING
File Size	104.79K / 2 Page	View it Online	Download Datasheet

For fifo Found Datasheets File :: 7933 Search Time::1.36ms
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